Interesting, but not too relevant...
Intel has published quite a bit about their 65nm process, which gives us a clue about what to expect...
Gate oxide thickness will not be reduced... This is pretty important. What it tells us is that gate oxide leakage per area should stay the same if operating voltage is kept the same. With the shrink we know that oxide area is cut in about half. Thus both active and static power draw will be around half if they operate at the same VCC.
Wire resistance should stay about the same, but with reduced loads and reduced self capacitance interconnect delay should drop by 30% or so. Intel is also implementing a next generation dielectric so interconnect capacitance should improve a bit more too. Intel has also added another layer of metal for 65nm. All told, this should result in some speed improvement at reduced power.
I also believe the prescott design was still not done being optimized before they gave up on it. A suspect another round of circuit speed optimizations have been put into cedarmill which should be worth some small speed improvement.
Your point on hyperthreading is important but only applies to Dempsey and probably not the standard presler.
In terms of the server space, I would not be that surprised if Intel decided to increase clock speed above 3.8Ghz. If Dempsey is indeed introduced at 150W I would expect clock speeds to be closer to 5Ghz than 4Ghz. Note that Intel needs to hit at least 4.75Ghz in order to match the performance of the 3Ghz opteron... so I suspect that AMD will maintain performance leadership even if Intel starts to push clock speed pretty hard with Dempsey.
--Alan
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