Replies to post #33600 on Advanced Micro Devices Inc (AMD)

[sgolds]

buck wheat, layout differences, take a look at my post #msg-3007086 and tell me if it makes sense. (If you don't want to look at the numbers, skip to the end for the conclusion.)

[Ixse]

Buck, # of layers remains constant during transition. At later stage 2 layers will be added though (for a total of 11; 9 now).

Kind regards,

Rink

[kpf]

buck wheat

Bill Siegle recently stated in an interview that they are doing a plain shrink first (same number of layers) and going for design changes in a major new stepping lateron, adding two interconnect layers.

As far as shrinking cache cells are concerned, Jerry Moench mentioned they see threshold-voltage fluctating a lot for smaller cache geometries. Could be the reason they are not able to build similar cache densities as Intel and others.

Finally, as for die-specs and real-estate numbers rumoured, I put them in a barrel of salt. There should be samples of 90nm chips in the wild very soon, so its only a question of when somebody opens the case and uses a ruler.

K.