Re: The guy who brought us peterwatts has now invented peterbytes
I don't know what's more idiotic. The fact that pgerassi doesn't know what the $*&^ he's talking about, or that other people actually believe his tripe.
Chipguy, > The guy who brought us peterwatts has now invented peterbytes
And his post already have 5 recommendations so far.
No doubt Barcelona is going to be a great chip, but K8 is due for a refresh anyway. Yet the 'Droids are masters of convincing themselves that AMD can walk on water.
By the way, Pete is also trying to convince me that HyperTransport would be a better memory interface than FBD:
Even the basic assumtion of his calculation appears to be false, because according to this article* the L1I-cache bus is "160+ bits" (so over 20 bytes) wide. Is there a more definitive number in the public domain?
That article also puts the average instruction lenght at ~4 bytes instead of ~4.8 bytes. And there is a buffer in between the cache and the decoders that loosens the coupling between fetch bandwidth and decode rate.
Anyway, I just wanted to add some technical arguments to the discussion instead of just pointing and laughing ;)
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