Replies to post #7919 on Advanced Micro Devices Inc (AMD)

[wbmw]

CJ, Re: AMD does a better job on the speed of their SOI process. They are currently shipping 1.8GHz with a processor that uses a 12 stage integer pipeline with several of those stages devoted to dealing with x86 stuff, which the PPC970 doesn't have.

LOL. Yeah, that's a great SOI achievement, especially considering that their bulk CPUs have a 10 stage integer pipeline that can currently scale to 2.2GHz on 130nm.

Re: Yet the PPC970 is slated to top out at 2GHz at 130nm. AMD likely can do better than that with a considerably shorter pipeline.

You're comparing apples to oranges. AMD uses plenty of custom circuits in their implementation to achieve their clock frequencies, while IBM does not. This has been confirmed by several sources, if you check around a bit. The point is you cannot compare the two frequencies on different designs and draw any kind of conclusion about the process, since the design has just as much to do with it.

[Elmer Phud]

CJ -

Sorry but you're not convincing me that IBM needs AMD's help in process technology or design. AMD has shown a consistent inability to match their designs with the capability of their process. The apparent poor yields they have shown over the last few years are best explained, IMHO, by over aggressive targeting of transistor channels in the attempt to gain more frequency. The addition of SOI and 2 pipeline stages has resulted in a slowing down of Opteron relative to it's higher clocking predecessor Athlon. These are not the signs of a level of process expertise that IBM needs to help them improve PPC. If they want poor yields, long delays and slower products then AMD has paved the way.

[chipguy]

AMD does a better job on the speed of their SOI process.

LOL. AMD takes an existing basic design, adds two pipeline and SOI processing and
loses 400 MHz of clock speed and you claim that AMD does a better job on SOI than
IBM?

IBM has taken a 64 bit PowerPC processor design with 34m transistors (RS64) and
ported it from 0.22 um bulk to 0.22 um SOI and got a 22% clock speedup while keeping
the pipeline length the same.

Also, IBM has taken a 180 nm SOI design (POWER4) and shrunk it to a 130 nm SOI
(POWER4+/PPC970) and apparently got a 54% clock speed up. How much of a clock
rate speedup does Barton or Hammer represent over the fastest 180 nm Athlon? AMD
can't teach IBM anything about process or processor design.