Monday, May 12, 2003 3:31:35 PM
However, the more trivial bugs are reported in the Errata, not in a press release.
Intel is very upfront about bugs since the FDIV debacle. Commendable, actually.
And I agree with chipguy, these things happen. (I seem to remember the Opteron had a pile of bugs at launch.)
Most of the costs of Itanium for Intel are the development. Making some new chips for the recall won't cost them much.
In order of increasing severity:
1 Bug with OS software workaround in low volume chip
2 Bug with hardware workaround in low volume chip
3 Bug with OS software workaround in high volume chip
4 Bug that requires recall in low volume chip
5 Bug with hardware workaround in high volume chip
6 Bug that requires recall in high volume chip
There are lots of 1's around, we mostly don't notice unless we like to hang out on the linux-kernel mailing list.
There are probably lots of 2's around, too.
An example of 3 is the f00f bug. Caused a lot of hoo-har when it was discovered, was soon worked around, who even remembers it?
This is class 4. AMD's problems with certain VIA chipsets were perhaps class 5. There's a long way to class 6 (FDIV), and even that was no problem to Intel once they found out how to handle the PR side (announce a free new CPU for all, but take advantage of people's innate laziness to avoid actually having to send many CPUs out).
Intel is very upfront about bugs since the FDIV debacle. Commendable, actually.
And I agree with chipguy, these things happen. (I seem to remember the Opteron had a pile of bugs at launch.)
Most of the costs of Itanium for Intel are the development. Making some new chips for the recall won't cost them much.
In order of increasing severity:
1 Bug with OS software workaround in low volume chip
2 Bug with hardware workaround in low volume chip
3 Bug with OS software workaround in high volume chip
4 Bug that requires recall in low volume chip
5 Bug with hardware workaround in high volume chip
6 Bug that requires recall in high volume chip
There are lots of 1's around, we mostly don't notice unless we like to hang out on the linux-kernel mailing list.
There are probably lots of 2's around, too.
An example of 3 is the f00f bug. Caused a lot of hoo-har when it was discovered, was soon worked around, who even remembers it?
This is class 4. AMD's problems with certain VIA chipsets were perhaps class 5. There's a long way to class 6 (FDIV), and even that was no problem to Intel once they found out how to handle the PR side (announce a free new CPU for all, but take advantage of people's innate laziness to avoid actually having to send many CPUs out).
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