jhalada, on possible K9 socket changes
I was wondering about the improvements for K9. It seems to me that AMD is going to try to go multi-core, or at least multi-threaded with dual core. It would seem that the existing HT links might be a problem, but if it is viewed as a two level system, could not the crossbar logic be changed to allow, say, 4 to 8 cores on a chip, communicating over three HT links to 2, 4 or 8 other chips the same? Then an 8-chip system could be 64P. As far as I can see, the only cHT protocol change needed would be to have 6 bits for a processor id rather than the 3 needed now, and even that might not be necessary.
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