InterDigital Inc (IDCC)

[Learning2vest]

Loop, this old bubba was already crusin' easy when he posted earlier after a "round" of golf with some sots he hangs out with on most early Sat t times, so be warned that this one is even mo suspect. That said, there is no better way to make my point about how chip patents are about "How the watch works" than the legal findings in your ref example(see excerpt copied below and focus on just my bolded item).

While THOSE patents protect "How a watch might work", ... IDCC's "air interface" application patents are all about "What time is it?", i.e., they DO NOT depend on, or intersect, any of the computer processing functional patents employed in a product designed to accomplish them. Do it any way you want, they still apply if the functions which result are compliant with the 3G functional specs(even if you managed to do that with two cans and a string, you would still need an "air interface" IPR license from IDCC).

At the same time, IDCC's Slimchip designs WILL need to be licensed for any proprietary internal processing methods included within their functional designs(i.e., stuff like memory management, multi-media encoding, security encryption and other "gears and pully" internal engineering tricks...

Here is the excerpt I mentioned earlier:

... "Frequently accessed data are generally stored in cache memory, which permits faster access than main memory and is often located on the microprocessor itself. Id., at 84. When copies of data are stored in both the cache and main memory, problems may arise when one copy is changed but the other still contains the original
“stale” version of the data. J. Handy, Cache Memory Book 124 (2d ed. 1993). The ’641 patent addresses this problem. It discloses a system for ensuring that the most current data are retrieved from main memory by monitoring
data requests and updating main memory from the cache when stale data are requested. LG Electronics, Inc.
v. Bizcom Electronics, Inc., 453 F. 3d 1364, 1377 (CA Fed. 2006).
The ’379 patent relates to the coordination of requests to read from, and write to, main memory. Id., at 1378. Processing these requests in chronological order can slowdown a system because read requests are faster to execute than write requests. Processing all read requests first ensures speedy access, but may result in the retrieval ofoutdated data if a read request for a certain piece of datais processed before an outstanding write request for the same data. The ’379 patent discloses an efficient method of organizing read and write requests while maintaining accuracy by allowing the computer to execute only read..."(snip) Whew!