Lightwave Logic Inc (LWLG)

[prototype_101]

Ha!! Too funny!!!! NEITHER of those are ahead of LWLG, that is PURE BS!!!

ECOC Slide 20 is the ONLY information you need to understand to know LWLG is a incredible buying opportunity!!

https://api.mziq.com/mzfilemanager/v2/d/307dbc8b-e212-48ba-9968-8cef3f6b5188/0d5d1e3e-2052-00d8-bb2f-2b7a2adf0310?origin=1

On the LEFT is a comparison of LWLG's technology to the touted #1 competitive threat TFLN

On the RIGHT is a comparison the other commercial Polymer materials development companies

To make it EASY PEASY for you, BOTH of these supposed BEST competitors pale by comparison!!!!!

Couple this with this recent Paper with authors from Cisco, Intel, and Arista (Andy B) which points out just how crappy TFLN's position is today in being ready to commercialize!! TFLN is a joke really!!! Even the #1 TFLN Development company recently said it may take 3 or more years from now to be able to scale volume of TFLN modulators!!! here from the Paper

“For monolithic TFLN modulators and PICs, 150 mm wafer is the largest size for product presently. Limited wafer size, large device footprint, relatively high material cost, and thin-film uniformity contribute a large portion of the chip cost. Although the chip fabrication is not overly complex, uniform waveguide formation for ultra-low loss operation is not trivial, which necessitates optimized photolithography, etching technology, and post-fabrication processes. Additionally, long-term DC drift remains a challenge for TFLN. To make these modulators commercially viable and reliable, thermally or electrically phase control is a must.

TFLN modulators heterogeneously integrated with silicon or Si3N4 are still in the R&D stage. Similar to III-V-on-silicon heterogeneous integration, TFLN integration occurs towards the back-end-of-line (BEOL) process and requires specialized processing tools along with stringent cross-contamination controls, especially if large-wafer scale processing is involved. The TFLN transfer step is critical for achieving high yield and optimal device performance.”

https://ieeexplore.ieee.org/abstract/document/10666944/references#references