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tkg

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tkg

Re: frobinso post# 84100

Wednesday, 11/17/2021 3:24:04 AM

Wednesday, November 17, 2021 3:24:04 AM

Post# of 232674
Same here fro, funny thinking back now, Mobileye was really my introduction to the terms ADAS & Autonomous driving (way back in 2017). I guess by the numbers we see today, $15B could be viewed as a deal. Credit to Krzanich for being early and seeing where technology was heading. Every time I swerve slightly out of the lines on the road and my SUV gently brings me back to alignment on it's own, I think all that amazing tech started with Mobileye.

https://techcrunch.com/2017/03/13/reports-intel-buying-mobileye-for-up-to-16b-to-expand-in-self-driving-tech/?guccounter=1&guce_referrer=aHR0cHM6Ly93d3cuZ29vZ2xlLmNvbS8&guce_referrer_sig=AQAAADVaKhs1mEBV4U6vU2n2j5NlK6-07zUgfC11oz8g-ga_Ld92ilgvKswckRwEuQMVPGICQiuDDwjaA24GetcVbex3_IBXCAS3GEVdDbJ6j8XJcc5S4dbqFPhb_6kB2tzHC7Dmwe9Rph4BYWeXHeowGl-0ibOuULJJ3QP8NJhRxvG0

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On a side note, here are some of the biggest figures I've seen to date re Intel's fab ambitions, wow, they are dropping some coin...sounds like more news before the EOY to be announced.

As part of its IDM 2.0 strategy, Intel is set to decide on the exact location of its next major semiconductor manufacturing hub in the U.S by the end of this year. The fab will include between six and eight modules that will produce chips using the company’s leading-edge fabrication processes, will be able to package chips using Intel’s proprietary techniques like EMIB and Foveros, and will also run a dedicated power plant, Pat Gelsinger said in an interview with the Washington Post.

(What is EMIB Intel?
Image result for Intel EMIB
Embedded Multi-die Interconnect Bridge (EMIB) is an elegant and cost-effective approach to in-package high density interconnect of heterogeneous chips. The industry refers to this application as 2.5D package integration. ... This bridge die is embedded as part of our substrate fabrication process.)


(What is Intel Foveros?
Image result for intel foveros
Foveros Direct is a technology that helps Intel drive the bump pitch of its die-to-die connections down to 10 micron, a 6x increase in density over Foveros Omni.
Intel's Foveros technology leverages wafer-level packaging capabilities to provide a first-of-its-kind 3D stacking solution.
Foveros enables Intel to build processors with compute tiles stacked vertically, rather than side-by-side, providing greater performance in a smaller footprint. It also allows Intel to mix and match compute tiles to optimize for cost and power efficiency.)



“We are looking broadly across the U.S.,” Gelsinger told the Washington Post. “This would be a very large site, so six to eight fab modules, and at each of those fab modules, between 10- and $15 billion. It's a project over the next decade on the order of $100 billion of capital, 10,000 direct jobs. 100,000 jobs are created as a result of those 10,000, by our experience. So, essentially, we want to build a little city.”

https://www.tomshardware.com/news/intel-to-spend-up-to-120-billion-on-new-us-manufacturing-hub
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