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Re: jeunke22 post# 60455

Sunday, 12/06/2020 7:43:55 AM

Sunday, December 06, 2020 7:43:55 AM

Post# of 233771
Jeunke, correct me if I'm wrong, but isn't the "what's new?" that they are using multiple micro-ring silicon modulators in a single lane (WDM), and then they have currently using this setup with 4 lanes (and saying they can expand to 8, 16 or more? another WDM level?)

so 4x25gbs (WDM) per lane, and then 4 lanes (currently, and with more WDM?) = 400Gbs, so then add PAM4 and 800Gbs device, right?

Considering they are still using 25Gbs as there modulator speed, and considering they need Electronic IC's to regulate temperatures of each of these micro-ring silicon modulators, and considering they are not eliminating the power hungry & expensive Drviers, I don't think this is going to be anything more than a stop-gap solution

above from breakout video about Integrated Photonics found by scrolling down about 80% towards bottom of page

https://newsroom.intel.com/press-kits/intel-labs-day-2020/#gs.n8b86q

the following notes from video near top of webpage (first segment talks about Integrated Photonics)

The opening segment up to about 12 mins focuses on Intel's work on an Integrated Photonics solution on Silicon, the micro ring modulator is shown briefly at around 10 mins, but it is just a rendering, not the actual device

The micro ring modulator is discussed as being so small as to Intel being able to incorporate "hundreds of these on a single package", Ok, so two things, #1 smaller is not faster, silicon modulators speed currently at 25Gbs with known limits at around 30Ghz so struggling to achieve 50Gbs transmissions, and #2 whatever number of these modulators they incorporate into a single device becomes "a lane" and as we have learned from recent conference presentations HG Genuine's rep Theo "cringes" at the thought of using more than 4 lanes

Also, note that about 11:30 they display Intel's prototype Integrated Photonics solution, if you look carefully you can see they are configured with 4 lanes of their micro ring modulators, which means in this first generation prototype they are achieving 100Gbs (4x25Gbs) as 25Gbs is currently the highest production speed of a silicon modulator, so although they say they can incorporate hundreds of micro ring modulators on a single device, I question that as being feasible based on the size requirements of just these 4 lanes in their first generation prototype
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