| Followers | 2 |
| Posts | 27 |
| Boards Moderated | 0 |
| Alias Born | 11/10/2012 |
Saturday, April 12, 2014 11:18:44 PM
The combined read/write miss per memory operation of 11.6% is accurate. That 11.6% also includes the MEMORY PERFORMANCE tests (memcpy, memset and lots of Streams variants) which have a 100% miss rate. Maybe I should invest the time to grab the information before the memory tests start. Note that the miss rate was from gb version 3.1.5
Interestingly, most of the "studies" on SPEC use the metric MISSES PER 1000 INSTRUCTIONS which is different than MISSES PER MEMORY ACCESS. I will have to be careful to identify which. From memory, there is typically 0.3 memory reads per instruction and
I have a copy of geekbench2 2.3.4 and there is an undocumented geekbench option where you can run just a single workload. That makes it easier to grab the per workload metrics. It does not appear to work the same (or possibly at all) on geekbench 3.
For example, if you add "--workload 101" to the geekbench 2 run, it will only run the Blowfish benchmark ....
geekbench --no-upload --workload 101
Geekbench 2.3.4 : http://www.primatelabs.com/geekbench/
Run Geekbench as root to gather accurate system information.
Blowfish
single-threaded scalar 2603 ||||||||||
multi-threaded scalar 11364 ||||||||||||||||||||||||||||||||||||||||
Digging around, I found a page from "Computer Organization and Design: The Hardware/Software Interface"
By David A. Patterson, John L. Hennessy on Google books.
http://books.google.com/books?id=EVhgAAAAQBAJ&pg=PA473&lpg=PA473&dq=spec+2000+cache+miss+rates&source=bl&ots=Ohx_EL88LI&sig=U__iWJ2HpM7xPS_RKmh-qO8mBvM&hl=en&sa=X&ei=I_RJU5qiAYaOyAH5rYGIDA&ved=0CGkQ6AEwBw#v=onepage&q=spec%202000%20cache%20miss%20rates&f=false
Maybe someone has access to the pages following 473 ... 8-)
Interestingly, most of the "studies" on SPEC use the metric MISSES PER 1000 INSTRUCTIONS which is different than MISSES PER MEMORY ACCESS. I will have to be careful to identify which. From memory, there is typically 0.3 memory reads per instruction and
I have a copy of geekbench2 2.3.4 and there is an undocumented geekbench option where you can run just a single workload. That makes it easier to grab the per workload metrics. It does not appear to work the same (or possibly at all) on geekbench 3.
For example, if you add "--workload 101" to the geekbench 2 run, it will only run the Blowfish benchmark ....
geekbench --no-upload --workload 101
Geekbench 2.3.4 : http://www.primatelabs.com/geekbench/
Run Geekbench as root to gather accurate system information.
Blowfish
single-threaded scalar 2603 ||||||||||
multi-threaded scalar 11364 ||||||||||||||||||||||||||||||||||||||||
Digging around, I found a page from "Computer Organization and Design: The Hardware/Software Interface"
By David A. Patterson, John L. Hennessy on Google books.
http://books.google.com/books?id=EVhgAAAAQBAJ&pg=PA473&lpg=PA473&dq=spec+2000+cache+miss+rates&source=bl&ots=Ohx_EL88LI&sig=U__iWJ2HpM7xPS_RKmh-qO8mBvM&hl=en&sa=X&ei=I_RJU5qiAYaOyAH5rYGIDA&ved=0CGkQ6AEwBw#v=onepage&q=spec%202000%20cache%20miss%20rates&f=false
Maybe someone has access to the pages following 473 ... 8-)
Recent INTC News
- Futures Signal Continued Gains for Wall Street: Dow Jones, S&P, Nasdaq • IH Market News • 04/17/2026 01:23:37 PM
- Futures Indicate Further Upside for Wall Street: Dow Jones, S&P, Nasdaq • UK Market News • 04/17/2026 01:23:27 PM
- Intel Unveils Core Series 3 Mobile Chips Aimed at Value Segment • IH Market News • 04/16/2026 02:40:59 PM
- TSMC Delivers Record Q1 Profit, Flags Potential Middle East Supply Risks • IH Market News • 04/16/2026 11:28:45 AM
- Intel and Google Deepen Collaboration to Advance AI Infrastructure with Xeon CPUs and Custom IPUs • Business Wire • 04/09/2026 01:00:00 PM
- U.S. stock futures edge lower as markets await Iran ceasefire talks in Pakistan: Dow Jones, S&P, Nasdaq, Wall Street • IH Market News • 04/09/2026 11:36:18 AM
- U.S. stock futures slip as markets await Iran ceasefire talks in Pakistan: Dow Jones, S&P, Nasdaq, Wall Street • UK Market News • 04/09/2026 11:36:10 AM
- Form 8-K - Current report • Edgar (US Regulatory) • 04/08/2026 08:05:34 PM
- Intel shares rise after joining Terafab semiconductor initiative • IH Market News • 04/07/2026 01:50:28 PM
- Form 8-K - Current report • Edgar (US Regulatory) • 04/03/2026 04:50:37 PM
- Intel Appoints Aparna Bawa as Executive Vice President and Chief Legal & People Officer • Business Wire • 04/02/2026 08:05:00 PM
- Ceasefire Hopes and Strong Economic Data Power Wall Street Rally to Start Q2 • IH Market News • 04/01/2026 08:34:46 PM
- Intel to repurchase Apollo’s stake in Irish chip facility for $14.2 billion • IH Market News • 04/01/2026 02:48:34 PM
- Intel to Repurchase 49% Equity Interest in Ireland Fab Joint Venture • Business Wire • 04/01/2026 01:00:00 PM
- Intel to Report First-Quarter 2026 Financial Results • Business Wire • 03/31/2026 09:02:00 PM
- Form SCHEDULE 13G/A - Statement of Beneficial Ownership by Certain Investors: [Amend] • Edgar (US Regulatory) • 03/27/2026 01:51:11 PM
- Intel shares rise after report of planned CPU price increases • IH Market News • 03/25/2026 03:24:25 PM
- Form DEFA14A - Additional definitive proxy soliciting materials and Rule 14(a)(12) material • Edgar (US Regulatory) • 03/23/2026 08:38:44 PM
- Form DEF 14A - Other definitive proxy statements • Edgar (US Regulatory) • 03/23/2026 08:35:22 PM
- Form 4 - Statement of changes in beneficial ownership of securities • Edgar (US Regulatory) • 03/04/2026 12:57:09 AM
- Form 4 - Statement of changes in beneficial ownership of securities • Edgar (US Regulatory) • 03/04/2026 12:56:24 AM
- Form 4 - Statement of changes in beneficial ownership of securities • Edgar (US Regulatory) • 03/04/2026 12:55:26 AM
- Form 4 - Statement of changes in beneficial ownership of securities • Edgar (US Regulatory) • 03/04/2026 12:54:23 AM
- Form 4 - Statement of changes in beneficial ownership of securities • Edgar (US Regulatory) • 03/04/2026 12:53:24 AM
