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fyodor

04/29/03 9:25 AM

#3367 RE: Dan3 #3364

Dan3: if you look at the .13 PIII, consider how much effort had already gone into refining the layout of that core, then look at Banias and what space taking additions were made, it's hard to see how that could have been done on the same process.

Tualatin was the product of a completely different (and, from what I understand, much smaller) design team.

Banias was made by Intel's Isreal teams, the ones who (almost) gave us Timna. I doubt if Banias has much in common with Tualatin. More likely, it's a completely Timna redesign, with most of the integrated features removed.

Tualatin was a stop-gap 130nm solution, needed to fill a particular space in the market until the arrival of Banias. I wouldn't be surprised if Tualatin was little more than a CuMine "dumb" shrink with prefetching being the only real addition.

-fyo

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kpf

04/29/03 10:20 AM

#3370 RE: Dan3 #3364

Dan re: But it does look like the current Centrino is at the leading edge of what all of Intel's ".13" FABs will be capable of after a year or so of "copy exactly" upgrades.

I guess that is right on the spot.
Tja, for those who did not know already, there is more than smart marchitecture coming from Santa Clara.
Well, for AMD we can only hope Thornton will have similar cache density as Banias and Prescott. Otherwise Craig will teach us about Diesize for a while :)
However, assuming Intels yields for this process are anything better than lousy, if they fully utilize their capacities next year at least they have enough capacity to supply into any upturn without any shortage visible.
With decent yields on this process and a Dual-Core-CPU already next year.... well, we all know already sometimes you get lil bit scared as an AMD stockholder.

On behalf of Darbes, who seems to prefer educating the folks at Speakers Corner today:

Stay tuned. The race is just in its early stages.

K.