Keith, I wouldn't say that little was done to improve frequency. They chose SOI, after all (though let's not bring up our own benefit of hindsight here). I'm sure they also optimized speedpaths, which is an ongoing job for layout engineers. They might have also expected ongoing process improvements. Furthermore, it might have also been a design decision not to focus on frequency as much as IPC, and then focus on frequency for the process shrink upgrade. Without knowing more, I wouldn't question the design decisions. Usually the architects for these CPUs know what they're doing.
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