Replies to post #15554 on Intel Corp (INTC)

[SemiconEng]

The numbers I've heard quoted is 15% reduction in frequency = 50% reduction in power.


Hummmmm..... I don't think it would be "wise" for me to comment on any specific numbers I've heard....

That being said, I don't seem to be disagreeing with what you've heard. BTW, wouldn't those frequency reduction vs. Power reduction numbers, fit just about right, with the reported Smithfield introduction speeds, and intel's comments about Smithfield fitting within "The same thermal envelope" as current offerings?

Interesting, eh? :-)

[Saturn V]

15% reduction in frequency = 50% reduction in power.

I do not completely understand that.

A process tweak to speed up the circuit by reducing transistor threshold would definitely increase the power exponentially.

But for the same process the relationship P = Cfv2, should hold. This implies a linear increase of power with speed. Unless the chip operates in a mode where the internal nodes do not finish charging or discharging during one clock cycle !