Please spend less time on name calling and
more time on trying to follow a thread
How about following your own advice. Both you and wbmw claim that, for many programs, if not most programs the advantage of more registers is completely counterbalanced by the fact that there is code bloat that can penalize programs that don't fit into the L1 D-cache.
Then QSORT was suggested and both of you claimed this was an unfair benchmark because it was so small that code bloat would not be an issue. I was pointing out that is IS fair because such a simple algorithm does not need more than 8 registers to be compiled with maximum efficiency, therefore QSORT would get no benefit from the extra registers.
What both of you apparently missed is that Opteron and Athlon 64 can do 64-bit atomic compares and data movement in long mode, but not in legacy mode. Alas, I guess it would be considered unfair to compare quicksort on 64-bit integers in legacy and in long mode?
Petz
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