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chipguy

11/16/07 3:48 PM

#52853 RE: kpf #52850

Going into 45nm currently only offers performance-advantages if you use technologies like MG/Hi-K stacks - which come at a price: It significantly increases variation.

This is nonsense. The high K property of the gate dielectric
allows its physical thickness to be greater than the ~1.2 nm
that nitrided SiO2 is limited to while having better control
of channel inversion and conduction. The greater physical
thickness of the most critical structure on the chip means
less manufacturing variation with hik/mg, not more.

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Elmer Phud

11/16/07 4:15 PM

#52859 RE: kpf #52850

Klaus

There was much speculation about essentially the same thing on Intel's 65nm process. One website was saying that because of Intel's almost perfectly aligned gates they must have a lot of failing die that couldn't meet that perfect alignment. I'm not a process guy and I'm probably doing a poor job of describing this but that's the essence of it. It wasn't true but it sure sounded like it should be true. Now the same argument is cropping up again with your's and other's speculation about some of the details of the 45nm MG process not being self aligning. Gate first vrs gate last. It was described in one of Intel's papers. Time will tell if this is a real issue or a non issue like 65nm.
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Saturn V

11/16/07 5:42 PM

#52872 RE: kpf #52850

MG/Hi-K stacks - which come at a price: It significantly increases variation. What you get out of such a DFM are couple of parts with very nice characteristics on the upper end..


I agree with chipguy that this statement is nonsense. It is a typical "grapes are sour" statement from someone who does not have the technology today.There is no fundamental physical basis for the statement. The High K dielectric allows a much thicker dielectric film than traditional Silicon dioxide films, which are only a few atoms thick for 65nm devices. The process control on a thicker film HiK film will be far superior.

But I am sure that the new technology is tricky for a new comer.It probably cannot be made in volume at IBM and AMD yet, because they do not have the experience.Intel has been running the process in the Lab and the Pilot Lines for several years. Intel has a secret metal composition for making the gate, and also secret recipes for processing the gates. In a few years time others will also develop the necessary process technology.

If your statement was true Intel will also be introducing an extremely large number of low performance parts. I see no evidence of that, and I bet that there will not be significant number of low performance parts