Let me get his straight. Intel gave a presentation saying they didn't have enough time to "implement all their new ideas on
how to improve both power efficiency and performance." You claim that this means they DID achieve much higher IPC and lower power.
Well, according to xbitlabs, the power envelope is now UP 5 WATTS. Some improvement, eh?
And the die size is larger than you expected, so that means everyone else is wrong and Intel quadrupled the L2 cache.
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