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RET_EE

11/04/06 9:11 PM

#51761 RE: 427Cobra #51751

'427Cobra' -- I believe that I understand your question and will try to provide some insight that may help. Here goes.

Many companies that build Application Specific Integrated Circuits start with a basic physical layout of what is known as a sea of gates or a sea of transistors. The mask set required to build the ASIC to this point is common to all designs and thus saves money and time when compared to a complete design from ground up. However this sea of gates approach is much less efficient in chip area utilization and the resulting integrated circuit is larger and may be more expensive in volume.

The process requires the various layers of metalization interconnect for these gates or transistors to become a functioning ASIC with the desired operational attributes.

The process of converting the FPGA design to the various patterns for the various layers of metal interconnect is NO SMALL TASK even though it is mainly done through using very expensive computer programs. The task can also take a significant bit of design time which equates to up-front non recurring engineering costs. Then there are the metalization interconnect mask costs which are also added to the non recurring engineering costs.

Most of the IC companies that I am familiar with also require a committed purchase of parts from the first run of the wafers. In many cases, the cost is a fixed amount for a fixed number of circuits that is added to the up front engineering costs. The cost for this first batch of parts is somewhat fixed since the production cost needs to be covered for the first run of parts.

Needless to say, the process costs a significant amount of money for all of the non-recurring engineering and mask costs along with the cost of the wafer run that will produce the actual parts.

Once the parts are produced, then the in depth testing and characterization testing needs to be done.

I hesitate to estimate the up front cost because the variables of the design effort dramatically influence the up front costs.

Hope this helps.

The above is just my opinion for what it is worth.

RET_EE
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spokeshave

11/04/06 11:52 PM

#51777 RE: 427Cobra #51751

I thought that a structured asic was one that was made by another company, kind of a prefab asic that you buy from them to put your code on.

No, there is no such thing as a prefab ASIC. Like any other custom silicon, all ASICS must be manufactured from scratch with silicon lithography.

There are basically three types of ASICs:

Full-custom ASICS - These are devices that are pretty much designed from scratch. The masks for each layer are designed from the bottom up, with all of the logic components designed specifically for the manufactuer's application. This is the most difficult and costly approach.

Gate-array ASICs - These devices use pre-characterized masks containing large numbers of gates that are already developed and tested. The manufacturer develops the logic by designing metal layers that connect the various gates as needed. However, other elements, such as clocks, test logic, power etc. must be custom designed.

Structured ASICs - These are very similar to gate-array ASICs in that the masks for the gate-arrays are already characterized. Additionally, elements that must be custom designed in the other ASIC types are already designed and characterized. There is typically a large library of pre-characterized mask elements offered by the manufacturer.

All ASICs are made-to-order. In other words, you don't buy ASICs off the shelf and program them. In fact, that is the definition of an FPGA. Instead, you buy a manufacturing approach. In the case of a structured ASIC, you buy the IP elements that you can use, and then design the metal layers to make all of the connections. The fab then takes these designs and makes the silicon.

You said that they said that they could just take someone else's ASIC and add things in to make their own. They can't do that. Think of an ASIC designing package as a computer with a hard drive and an operating system. By itself, it can't do much. A company like Oracle develops logic that can run on the hardware, and makes it into something useful. You are saying that Rim could take the Oracle software, add a few things to it and call it Rimacle.

That's not allowed.

Are you saying then, that the company makes their own structured asic and doesn't buy someone elses?

You can buy someone's ASIC development and production services. That's how ASICs are made.