"I included the example of the DDR2 vs FBD wiring because it was an excellent visual example of some of the others factors - trace density, area wastage from length matching serpentines, package
pincount vs required trace pitch to connect to inner pins, and PWB stackup."
Good points. But these points apply to both Intel and AMD on the desktop since Intel is already at DDR2 and AMD is moving there. For Socket939, AMD claims to have placed the socket pins to make a four layer board the standard. While I don't know they did the same for AM2, I suspect they at least tried.
"If you had any frigging clue about board level design you would have gotten the point instantly."
When someone drops something that is totally irrelevant into the discussion without any explanation, I don't look too deeply for meaning. I actually do have a fair amount of board design in my background, thank you very much.
"The real issue is you are obviously a dumb *** literalist"
Umm, right. Paul, there once was a time when most of your posts were interesting to read. That is almost never the case any more. In fact, you have turned into a foul mouthed, sanctimonous, condescending twit. Oh, and an Intel pimp.
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