Replies to post #4865 on AMD strictly moderated (AMD)

[mas]

He's written posts everywhere that agree with me. Obviously he feels the need to come to wbmw's aid without actually agreeing with her ;-).

[chipguy]

Didn't you write on rwt just before K8 arrived that you thought that K8 would have a 10-15% performance improvement due to the integrated MC? I.e. about half of the total improvement you expected? I remember you said something like this (might be off slightly) because you turned out to be quite right.

I don't remember. I might have made an estimate based on
K7's performance scaling with frequency on SPECint2k and
a guess of how much memory latency would be saved.

The problem is the proportion of the performance difference
between K7 and K8 attributable to the integrated memory
controller varies wildly from program to program. At one
extreme are low ILP codes dominated by serial data depend-
encies (e.g. pointer chasing codes) in which the IMC gives
nearly 100% of the improvement. The other extreme is very
cache friendly code in which the IMC gives basically 0% of
the improvement. The "average value" is highly sensitive
to the selection space of programs considered as typical
or representative.