AI
Monday, April 28, 2003 7:50:04 PM
Klaus: As for the comparison of Banias and Barton it is a lot more than 30% because Banias has 1MB L2 and Barton just 512KB of it.
Ok there is 128KB L1 for Barton as well compared to just few KB L1 for Banias as well. But sums up for roughly twice the cache density for Banias compared to Barton.
I disagree.
First, let's revisit Barton's L2 cache density. I made an estimate before, now let's try a different one: Take a look at the Tbred die photo (see my post a few minutes ago) and measure the relative area of the L2 cache. The die size is somewhere between 81mm² and 87mm², depending on which Tbred variant the photo is of. My measurements give almost exactly the same 56mm² obtained with the previous method. I hereby assume that this figure is fairly precise
Now let's try and estimate Banias' L2 cache density. This is quite a bit harder, but we'll give it a go none-the-less. To try and get a feel for the relative size of the PIII core to the Athlon core, let's try and look at the 180nm versions of the two (256kB L2 cache cersions, no prefetching):
Athlon "Thunderbird": 120mm²
PIII "CuMine": 95mm² (C0 stepping is smaller, earlier are larger - an argument could be made for using 100mm² here instead).
Let's now subtract the cache, as best we can. Using the Duron of the time, we can estimate the Tbirds L2 cache density at 9.6 kB / mm² (sorry for changing units here). CuMine cache density can be estimated using another die photo provided by sandpile.org (link below). My measurements yield of density of around 11.5 kB / mm².
Using these densities, we can be the "core" die size of the two processors:
Athlon L2-less core: 93mm²
PIII L2-less core: 73mm²
Now, the next assumption (on which this whole excersize rests) is the rather blunt one that the *ratio* of these cores will be roughly the same after shrinks, addition of prefetching etc. etc. Clearly, this is something of an approximation, but it's the best we (I) have to go on.
Athlon(noL2) / PIII(noL2) = 1.27
Barton(noL2) = 73mm² (using 101mm² die size - 56mm² / MB L2)
Banias(noL2) = 73mm²/1.27 = 57mm²
Banias L2 cache = 23mm² / MB L2.
Ok, I submit. Clearly, Banias L2 cache density is *incredible*. That's *more* than 2.5 times as the density of Barton's L2 cache. OUCH.
Uhmmm.. Would you happen to have a link with the 80mm² claimed Banias die size?
-fyo
Ok there is 128KB L1 for Barton as well compared to just few KB L1 for Banias as well. But sums up for roughly twice the cache density for Banias compared to Barton.
I disagree.
First, let's revisit Barton's L2 cache density. I made an estimate before, now let's try a different one: Take a look at the Tbred die photo (see my post a few minutes ago) and measure the relative area of the L2 cache. The die size is somewhere between 81mm² and 87mm², depending on which Tbred variant the photo is of. My measurements give almost exactly the same 56mm² obtained with the previous method. I hereby assume that this figure is fairly precise
Now let's try and estimate Banias' L2 cache density. This is quite a bit harder, but we'll give it a go none-the-less. To try and get a feel for the relative size of the PIII core to the Athlon core, let's try and look at the 180nm versions of the two (256kB L2 cache cersions, no prefetching):
Athlon "Thunderbird": 120mm²
PIII "CuMine": 95mm² (C0 stepping is smaller, earlier are larger - an argument could be made for using 100mm² here instead).
Let's now subtract the cache, as best we can. Using the Duron of the time, we can estimate the Tbirds L2 cache density at 9.6 kB / mm² (sorry for changing units here). CuMine cache density can be estimated using another die photo provided by sandpile.org (link below). My measurements yield of density of around 11.5 kB / mm².
Using these densities, we can be the "core" die size of the two processors:
Athlon L2-less core: 93mm²
PIII L2-less core: 73mm²
Now, the next assumption (on which this whole excersize rests) is the rather blunt one that the *ratio* of these cores will be roughly the same after shrinks, addition of prefetching etc. etc. Clearly, this is something of an approximation, but it's the best we (I) have to go on.
Athlon(noL2) / PIII(noL2) = 1.27
Barton(noL2) = 73mm² (using 101mm² die size - 56mm² / MB L2)
Banias(noL2) = 73mm²/1.27 = 57mm²
Banias L2 cache = 23mm² / MB L2.
Ok, I submit. Clearly, Banias L2 cache density is *incredible*. That's *more* than 2.5 times as the density of Barton's L2 cache. OUCH.
Uhmmm.. Would you happen to have a link with the 80mm² claimed Banias die size?
-fyo
