wbmw: It seems rather odd for an engineer to explain that they ripped everything out, started from scratch, and later ended up close to where they started. In some cases, I can see how they would want to redo things from scratch - routing and gating are two examples. The same was done for Banias. In terms of actual logic, I can't imagine what they did differently. Athlon already had a fairly optimized backend. The quote that you linked seems to suggest a lot of rework for nothing, and I don't buy it.
I was going to agree with you on this, but a bit of detailed comparison using the only evidence at (my) hand persuaded me that the Inq's story of a total rework at the transistor level has some truth to it.
Take a look at the AMD Opteron die photo. Contrast that to the best Athlon die photos you can find. Sandpile.org have a couple that are interesting in this case (linked below): One of an 180nm Palomino and one of a 130nm Tbred. The two are virtually identical, except for the location of the L2 cache.
HUGE differences. The overall structures are similar, but everything appears rearranged, slightly altered, etc. Opteron certainly seems to be a much more thorough rework of the Athlon that I had previously assumed.
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