Advanced Micro Devices Inc (AMD)

[chipguy]

I do think there may be some negative implications to sub-threshold leakage for staying with the thicker oxide. Perhaps chipguy could chime in on this issue?

Sure. Everything else being equal thicker oxide means less
gate tunneling leakage but more sub Vt leakage because
two dimensional electric field edge effects at the source
and drain regions are relatively more important. Thicker
oxide also means lower transconductance (i.e. transistor
drive strength for a given size). To compensate you either
raise supply voltage or lower threshold voltage, both of
which increase leakage, or accept a slower device. That
is why everyone is interested in a high k device dielectric.
It lets you keep the reliability and low tunneling leakage
of a thick dielectric layer but gives you the drive and
channel control of a thin layer.