Joe, Doug, I'm somewhere in between you and Petz I guess: While I agree with your interpretation I also keep thinking that while it might not mean much Charlie did not retract his INQ story about a possible quad core in Q1 06, nor did he say anywhere on the internet that I know off that that story was bogus. At the least it means he has since not received any good info to the contrary. I don't know, Charlie might easily be wrong as the official AMD reading was more like that quad core is more of a 2007 thing.
Maybe a couple of points from that analyst presentation:
#68: Coming soon: Multi-core + scalable SMP architecture, HT v3.0, DDR3 + FBDIMM, etc...
This means e.g. that possibly all of the HT 2.0 speeds ranging from 1.0GHz to 1.4GHz are already available now but are not turned on e.g. because of power / performance equation currently is the reason that 1.0GHz apparently is OK for now. It also means that Q1 06 parts might possibly include HT3.0 (ofcourse the time frame here is not exactly a given). Multi-core refers to quad core imo (this will however not necessarily be used at the start as dual core was included in the first K8's but only got implemented with second generation 90nm). This multi-core mention supports Groo's stance to some extent though. Scalable SMP architecture might include improvements to how the cores work together (actually I don't know enough about SMP to really make even this comment; sigh...).
That same slide #68 contains information about longer term future: FPU extentions to AMD64, Throughput architecture (related to cell architecture stuff imo), On-chip co-processors (e.g. for FPU), HT4.0, DDR4 + FBD2, etc...
Regards,
Rink
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