Zeev's Turnips Patch-No Politics (ZEEV)

[redwards]

Zeev , check this on NVEC, fwiw, VMRAM - Shorts Worse Nightmare-2
by: blackuwinreduloose
Long-Term Sentiment: Strong Buy 02/05/05 03:16 pm
Msg: 102675 of 102677

VMRAM shock waves?

On November 11 in Florida at the Magnetism and Magnetic Materials Conference, NVE Corporation, the US Navy and Carnegie Mellon University are presenting a paper on VMRAM memory, entitled "Address line-assisted switching of vertical magnetoresistive random access memory (VMRAM) cells," from researchers J. Anderson; D. Brownell; G. Prinz; H. Huggins; L. Van; J. Christodoulides; and J. Zhu.

This, say expert strategy observers, may not be 'your typical MRAM type presentation' but perhaps a grand joint announcement to the introduction of a Holy Grail achievement for SRAM, DRAM and hard disk replacement.

MRAM works by data written by a small electrical current, which creates a magnetic field that flips electron spins in a spin-dependent tunnel junction. Data is read as the resistance of the junction. VRAM, a type of MRAM, uses washer-shaped thin films for the magnetic element.

VMRAM cells consist of toroid-shaped elements, which have a stable closed-flux magnetic configuration, and intersecting address lines situated above and beneath the element.
Current through the element provides a half-select during either a read or write while the radial field generated by address lines provides the complementing half-select.

While switching of VMRAM elements using sense current alone has been demonstrated, these results represent the first time that address lines have been used to assist switching in VMRAM memory cells. Experiments were performed on sixty-four element strings with intersecting address lines that provided 2-D selection in a 4x64 array configuration.

Devised and developed by Dr. G A Prinz, et al, of the Naval Research Laboratory and Dr J. Zhu, of Carnegie Mellon University, VMRAM cells consist of toroid-shaped elements, which have a stable closed-flux magnetic configuration, and intersecting address lines situated above and beneath the element.

Current through the element provides a half-select during either a read or write while the radial field generated by address lines provides the complementing half-select. While switching of VMRAM elements using sense current alone has been demonstrated, these results represent the first time that address lines have been used to assist switching in VMRAM memory cells.

Experiments were performed on sixty-four element strings with intersecting address lines that provided 2-D selection in a 4x64 array configuration. In general, unassisted switching of full strings of elements occurred in wide distributions of sense current. Hard layer switching occurred between 10-16 milliamps, while soft layer switching ranged from >1-9milliamps. When address current was introduced, a percentage of the addressed cells tended to switch singularly at the point of assertion.

The point at which the largest change, representing the greatest number of bits, occurred, became the primary measurement parameter. Initial data indicated that soft layer switches occur at 7milliamps of sense line current with 4milliamps of address current and write switches occur at 15milliamps of sense line current with 8milliamps of address current.
With projected density scaling to 400 Gbits/in^2, VMRAM has the potential to compete with both semiconductor memories and mechanical hard disks.

In June and August this year NVE was granted a patent on MRAM innovation (No 6744086)and another for key MRAM structure (No 6777730) respectively. NVE's current MRAM licensees include Motorola Inc, Honeywell International, and Cypress Semiconductor Corp.