Monday, October 25, 2004 3:51:49 PM
Joe, Re: A simple constrained of a test with the servers equipped with the equal amount of memory would reduce the discrepancy.
If it were that simple, Intel would be ensuring that the OEMs use more memory in the Xeon systems to outperform Opteron. However, while it's true that TPC-C is a memory hog, the benefit of additional memory is going to depend on the architecture of the system. In the case of Xeon, doubling the memory may add more cost than the performance gains could recover. The price/performance aspect of TPC-C makes it unique in that submitters are more conscious of ballooning system cost. So while it's possible that adding more memory could increase the Xeon score a little, it's very doubtful that it would be enough to outperform the Itanium system, or else Intel would have already submitted such an entry.
Re: Further, not crossing the flat addressable memory limit of one architecture of just one architecture, and not other would reduce the discrepancy.
I assume you mean that EM64T would increase the performance of the Xeon submission. This is probably true to a degree, but the point is moot, since the 64-bit software stack is unavailable for the TPC-C benchmark. By the time it is available, Intel will have launched the 90nm Montecito chip, which ought to blow the other x86 submissions completely out of the water.
Re: Your benchmark (TPC-C) is not a CPU test, it is a client server system test, with so many unconstrained variables beyond the CPU that it can't be used to prove much without putting some constrains on some variables.
If that's your position, then let's discuss the platform. TPC-C demonstrates that the IPF platform is the strongest candidate - by far - in database tests, and the gap gets larger with more processors in the system. If x86 is just as good, why can't it seem to beat a platform that was launched 15 months ago? That's certainly enough time in this business to catch up on performance. I think it's naive to assume that Montecito won't raise the bar that much further out of reach for x86 platforms.
If it were that simple, Intel would be ensuring that the OEMs use more memory in the Xeon systems to outperform Opteron. However, while it's true that TPC-C is a memory hog, the benefit of additional memory is going to depend on the architecture of the system. In the case of Xeon, doubling the memory may add more cost than the performance gains could recover. The price/performance aspect of TPC-C makes it unique in that submitters are more conscious of ballooning system cost. So while it's possible that adding more memory could increase the Xeon score a little, it's very doubtful that it would be enough to outperform the Itanium system, or else Intel would have already submitted such an entry.
Re: Further, not crossing the flat addressable memory limit of one architecture of just one architecture, and not other would reduce the discrepancy.
I assume you mean that EM64T would increase the performance of the Xeon submission. This is probably true to a degree, but the point is moot, since the 64-bit software stack is unavailable for the TPC-C benchmark. By the time it is available, Intel will have launched the 90nm Montecito chip, which ought to blow the other x86 submissions completely out of the water.
Re: Your benchmark (TPC-C) is not a CPU test, it is a client server system test, with so many unconstrained variables beyond the CPU that it can't be used to prove much without putting some constrains on some variables.
If that's your position, then let's discuss the platform. TPC-C demonstrates that the IPF platform is the strongest candidate - by far - in database tests, and the gap gets larger with more processors in the system. If x86 is just as good, why can't it seem to beat a platform that was launched 15 months ago? That's certainly enough time in this business to catch up on performance. I think it's naive to assume that Montecito won't raise the bar that much further out of reach for x86 platforms.
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