Tuesday, March 16, 2004 1:02:38 AM
>Is this how you're going to spin the 32-bit compatibility feature as a fault?
WTF? The context was the true representative benefit of
using 64 bit coding vs anecodotal reporting. If you can't
keep up with a thread then perhaps you should refrain from
joining in.
Point was, and fact is, you'll try to paint the Opteron in as poor light as possible, in as many ways as possible, no matter how ridiculous the assertion. In this case, by positing that the One True Average is that derived from taking every single possible 32-bit application and comparing it to it's long-mode counterpart.
When in reality, all anyone really cares about are the applications that actually benefit from compiling to a long-mode target.
>I'd bet that the doubled register file, low memory latency, and glueless multiprocessing will boost the average application's performance just fine.
And what does K8's low memory latency have to with coding
for 64 bits? Does the integrated memory controller only work
in long mode? Same goes for MP functionality. Yet you mix
these factors in with "doubled register file", an architectural
feature only available in 64bit code. Perhaps if you had a
working grasp of the basic difference between architecture
and implementation your comments would make more sense.
Point was, the Opteron isn't going to be competing with itself. All that really matters is that the Hammer architecture is looking more and more untouchable by Intel as time goes on, for 64- AND 32-bit software. I'll even throw you a bone, and say that that statement doesn't apply to the upper-echelons of the HPC market where the Itanium dominates. (How do you do a "rolling-eyes smiley"?) I was going to draw an explicit comparison between chips with these features, and its contemporaries that... won't. But that would just lead to claims that Intel is going to fix their hugely broken process Real Soon Now, and we should get ready for the Ultimate Disappointment, which has been One Quarter Away for a year now.
You and wbmw are getting all twisted around the axle trying to theorize the long-mode performance gain into the ground, and yet neither of you provide any support for your position. In fact, your position includes a built-in defense against anybody that actually does provide concrete evidence of long-mode's superior performance. "Well, that's just one application, what about all those others we don't and won't hear about?" "Well, that's just TWO applications... Ooops, make that 2 DOZEN applications..." And so on and so on.
fpg
WTF? The context was the true representative benefit of
using 64 bit coding vs anecodotal reporting. If you can't
keep up with a thread then perhaps you should refrain from
joining in.
Point was, and fact is, you'll try to paint the Opteron in as poor light as possible, in as many ways as possible, no matter how ridiculous the assertion. In this case, by positing that the One True Average is that derived from taking every single possible 32-bit application and comparing it to it's long-mode counterpart.
When in reality, all anyone really cares about are the applications that actually benefit from compiling to a long-mode target.
>I'd bet that the doubled register file, low memory latency, and glueless multiprocessing will boost the average application's performance just fine.
And what does K8's low memory latency have to with coding
for 64 bits? Does the integrated memory controller only work
in long mode? Same goes for MP functionality. Yet you mix
these factors in with "doubled register file", an architectural
feature only available in 64bit code. Perhaps if you had a
working grasp of the basic difference between architecture
and implementation your comments would make more sense.
Point was, the Opteron isn't going to be competing with itself. All that really matters is that the Hammer architecture is looking more and more untouchable by Intel as time goes on, for 64- AND 32-bit software. I'll even throw you a bone, and say that that statement doesn't apply to the upper-echelons of the HPC market where the Itanium dominates. (How do you do a "rolling-eyes smiley"?) I was going to draw an explicit comparison between chips with these features, and its contemporaries that... won't. But that would just lead to claims that Intel is going to fix their hugely broken process Real Soon Now, and we should get ready for the Ultimate Disappointment, which has been One Quarter Away for a year now.
You and wbmw are getting all twisted around the axle trying to theorize the long-mode performance gain into the ground, and yet neither of you provide any support for your position. In fact, your position includes a built-in defense against anybody that actually does provide concrete evidence of long-mode's superior performance. "Well, that's just one application, what about all those others we don't and won't hear about?" "Well, that's just TWO applications... Ooops, make that 2 DOZEN applications..." And so on and so on.
fpg
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