Perhaps this was done so that they could easily create a 8 core Nehalem derviative. Mirroring the 4 core and modifying the IO/CSI ports on the mirrored side could possibly constitute much of the rework for Nehalem 8 core. Hmmm.. What is Beckton again? On the other hand, AMD's 4 core Barcelona's floormap had the L3 cache in the center and they have to go with the MCM approach to get 8 cores or to drastically re-work their design.
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