Saturday, January 24, 2004 11:08:48 AM
chipguy -
Ummn, isn't this about our third time around this
particular mulberry bush?
At least, maybe 4th.
"The HyperTransport bus is designed to enable semiconductor devices to communicate with each other at an unprecedented 1.6 Gbps. This exciting new technology presented new test challenges in the area of speed, accuracy and differential signaling. We are pleased that AMD has selected Teradyne's J973EP inSync Differential Test option, the ATE industry's first 1.6 Gbps differential test solution."
Well how else would they characterize it? Of course they need something like this. They couldn't possibly do it without either the Teradyne mentioned above or a similar system from Agilent unless they want to sit at a bench with a scope, a signal generator and a jitter injection module. Characterization and production are two different things. Once the interface is characterized within the process window and it is shown to meet spec, the only thing you need to do in production is show that it is free of defects. You don't need the characterization platform to do that and the above mentioned system wouldn't survive in a production environment anyway. Imaging 48 differential pairs, all needing to be calibrated to around 40ps, sitting there being banged with thousands of socketings between calibrations. If AMD wants to do that then good for them but they are putting themselves at an extreme disadvantage that the competition doesn't suffer.
Ummn, isn't this about our third time around this
particular mulberry bush?
At least, maybe 4th.
"The HyperTransport bus is designed to enable semiconductor devices to communicate with each other at an unprecedented 1.6 Gbps. This exciting new technology presented new test challenges in the area of speed, accuracy and differential signaling. We are pleased that AMD has selected Teradyne's J973EP inSync Differential Test option, the ATE industry's first 1.6 Gbps differential test solution."
Well how else would they characterize it? Of course they need something like this. They couldn't possibly do it without either the Teradyne mentioned above or a similar system from Agilent unless they want to sit at a bench with a scope, a signal generator and a jitter injection module. Characterization and production are two different things. Once the interface is characterized within the process window and it is shown to meet spec, the only thing you need to do in production is show that it is free of defects. You don't need the characterization platform to do that and the above mentioned system wouldn't survive in a production environment anyway. Imaging 48 differential pairs, all needing to be calibrated to around 40ps, sitting there being banged with thousands of socketings between calibrations. If AMD wants to do that then good for them but they are putting themselves at an extreme disadvantage that the competition doesn't suffer.
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