AMD strictly moderated (AMD)

[chipguy]

Oh yeah, the decoders that look like memory structures.

Um, you might want to take a look at a labeled K8 die photo before you embarrass yourself further.

Nice call Doug.


http://www.realworldtech.com/forums/index.cfm?action=detail&PostNum=4254&Thread=9&entryI...

">Do you think there is a fourth decoder like Gipsel argues
>here:
>
>http://www.aceshardware.com/forums/read_post.jsp?id=115160237&forumid=1
>

These are the micro-code ep(roms) for complex cisc
instructions. They operate as one single memory since
they all get the same address from the micro-sequencer
which handles the complex instructions. Going from 3 to
4 therefor doesn't say anything at all, it's just more
memory, or the same amount of memory with larger cells.
The rest of the architecture is visibly 3-way. The re-
order buffer, the integer schedulers, the integer ALU's. "


The supposed FP boosted K8L with essentially unchanged FPU.

You're clearly not looking very closely. It's *much* larger relative to the ALU, compared to the K8.

Another nice call Doug.


">And what do you think about the floating point units?
>


It's virtualy identical to existing K8's. There are also 3 HT
units and not 4 as claimed by somebody at aces. It's not a K8L."