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it's not for 130nm.
We'll see about that. Forgive me if I don't take your statement as fact.
Some at AMD have already stated 90nm is producing much lower power chips, so I don't believe it is for 90nm.
It's certainly not for 130nm, as it only kicks in at 4200+ and above.
It was for 2.6Ghz parts, which could certainly still be 130nm.
It was claimed this info was off a brand new roadmap.
Did anyone see this part of the anandtech article:
Most interesting, however, is the small footnote below the roadmap which claims the FX-55 and Athlon 64 >4000+ (presumably 4200+) will require 104 watts/80 amps. According to P = IV, we assume the processors must be running at 1.3V.
There is something to get out of this even though the analysis is flawed. The spec is 104W TDP and max ICC 80 amps, which says nothing about the voltage.
But what I did get out of this is AMD is increasing TDP on A64. I would hope this increased spec is for extending 130nm lifetime and is not the spec for 90nm parts.
http://www.anandtech.com/cpu/showdoc.html?i=2056
But getting 2 4P 850 systems for EDA work versus the 1 2P IPF system will make the IPF 1/4th the speed for the same cost.
This really depends on the software licensing costs. A lot of EDA tools are licensed per CPU, and the EDA vendors charge enough to overcome any hardware cost differential. It is best to have the fastest single CPU you can to get the most out of the license. In many cases this still means Opteron.
BTW SPECfp does not really correspond to EDA performance as the EDA datasets are much larger.
Now this is an excellent point, and it seems to correlate with what I have personally experienced with various datasets in the >200MB range. The Opteron systems I have used also seem to have unusually high i/o performance, which really helps here. It is obvious that SPECfp is all about cache. Take a look at the various scores of Xeon and P4EE, where the only difference is cache size.
The man in charge of Intel's Itanium and Xeon product lines ... to lead Cadence Design Systems.
Yeah I saw that. I wonder if Fister's departure from Intel was a good or bad one. It could go either way. I know Intel has pressed all of the big three EDA companies to port to Itanium as a priority, and the customer is always right in the EDA business. I'm sure AMD has applied similar pressure, but I would guess AMD represents a smaller portion of business than Intel for these companies given AMD's smaller and less numerous design teams. I'm sure Intel helped make some decisions on porting priority for these companies when they announced support for AMD64, although I'm sure ia64 is still on the list of ports for most tools.
I would agree with Alan and chipguy that some EDA tools will run better on Itanium, and some better on Opteron. A company buying EDA tools can buy one of each and run the tool on the best machine for the tool. I would remark that Opteron is probably the best do it all machine, but I'm not sure that matters here. The cost of the processor is so miniscule that the company is going to buy the machine that runs the EDA app the fastest. The licensing fees for some of these applications is outrageous compared to the hardware cost, which is why you spend the money on the best hardware for the app to get the most out of the license.
Which Cadence product are you referring to? I know a number of them run best on Opteron compared to every other platform out there. Many Cadence products are not yet officially ported to AMD64, but they are coming soon.
http://www.electronicstalk.com/news/cad/cad197.html
"Porting to the AMD Opteron processor-based systems is a natural fit for Cadence. We already have customers taping out designs with 50 to 100 million gates. Porting to AMD64 technology offers tremendous advantages to our customers who want a quicker design time, more capacity, and increased performance for their high-end chips", said Lavi Lev, Executive Vice President and General Manager of the Cadence Implementation Division.
Check out Acer's 64-bit Ferrari with 1400x1050 screen and RADEON™ 9700, 128MB DDR graphics card.
Man I really want one of these, but I really have no use for another notebook.
The 'fully diluted' number of shares that is used to calculate profit per share includes shares reserved for employee grants.
I think 'fully diluted' only counts shares that have actually been granted from the pool, but I could be wrong. If you watch you'll see the fully diluted number creep up about one million each quarter as more shares are granted out to employees. I'm not sure how to account for this creeping if it isn't stock options being granted. Here are the diluted share counts for the last 2 years:
Q102 341
Q202 342
Q302 343
Q402 344
Q103 345
Q203 346
Q303 347
Q403 416
Q104 417
I guess we'll find out for sure if the 17.4 is added now or over time when Q2 earnings are reported.
Well as long as they don't do this every year at the stockholders meeting
You can always vote against it! :)
I voted for the plan this year.
The convertible bonds have done much more to the stock dilution than the stock option plans in recent years.
I'm aking if the new 45 million dilution in stock which is greater than ten percent of the outstanding shares.
See my last post. It is not an additional 45 million dilution. It is a possible 17.4 million additional dilution. The balance of the shares comes from rolling the previous incentive plans that were approved many years ago into this one all encompassing plan. This plan is designed to last many years. They are not going to give out 45 million shares as incentives right away. In a few years AMD may be doing stock buy backs if they have extra funds to counterbalance the dilution. For now they are putting the money where they should, into Fab36 and process development.
I'm sure some investors have misinterpreted this and that is causing the stock price to come under some pressure.
is this the reason for the stock tanking today? any comments would be appreciated...
This was the stock option plan that was approved by the shareholders not too long ago, so it isn't really anything new. Perhaps the reality is just now sinking in about the potential future dilution. One thing to note from the filing is the possible additional dilution is not 45 million. This plan replaces previous plans which were already accounted for. Here is the quote:
the maximum aggregate number of Shares that may be issued under the Plan is seventeen million, four hundred thousand (17.4 million) Shares plus: (i) the number of shares of Common Stock reserved under the Company’s the 1995 Stock Plan of NexGen, Inc., 1996 Stock Incentive Plan, the 1998 Stock Incentive Plan and the 2000 Stock Incentive Plan (the “ Prior Plans ”) that are not subject to outstanding awards under the Prior Plans on the date this Plan is first approved by the Company’s stockholders (the “ Effective Date ”), and (ii) the number of shares of Common Stock that are released from, or reacquired by the Company from, awards outstanding under the Prior Plans at the Effective Date.
So it looks to me like 17.4 million more shares could be granted than before, bringing the total to 45 million. I don't think any of the 45 million total is counted until the shares are actually granted to employees, so this dilution will happen over a period of several years as they give out incentives to employees.
If Best Buy advertised the Acer Ferrari 3000 Athlon 64 notebook, they'd sell a zillion of them.
Yeah no kidding! All these boring looking laptops lined up, and them BAM! a nice Red one with a Ferrari emblem on it. I'm really tempted to get one for myself, and I don't even need it.
You guys read *way* too much into every intraday movement of the stock price.
I notice unusual patterns in trading, and yesterday and today qualify as unusual and divergent from the market in general. I don't really care too much unless there is something looming we haven't heard about that would affect things long term. Usually when the stock trades like this, there is something behind it. I'll probably be invested in AMD for at least the next year and a half, but that doesn't mean I don't pay attention to short term momentum and news. There could be something significant here.
Strange stock behavior
Am I the only one who thinks this? Volume is heavy today. Institutions changing hands? I wonder what triggered the selling. Probably something we haven't heard yet.
What numbers?
What the??? The post I responded to was deleted, and it doesn't qualify for any of sgolds reasons. Looks like a mistake. Edit: OK the poster requested it to be deleted.
The SEC filing mentions exact percentage increases in ASPs and units for both CPG and Memory groups. I went and looked at the filing directly to get the information back on the board. This is what I was talking about:
The decrease in net sales was primarily due to a seven percent decrease in microprocessor unit shipments due primarily to lower seasonal market demand, partially offset by a seven percent increase in average selling prices of our microprocessor products.
The increase in net sales was primarily attributable to an increase of approximately 13 percent in average selling price, partially offset by a two percent decrease in unit shipments
have you looked at the SEC File?
Why the heck don't the mention these numbers in the conference call? This is very good information to have. I'm going to start reading the SEC filings from now on.
More reason for AMD to put priority on dual core Athlon-64 rather than Opteron.
The beauty of this is Opteron and Athlon64 are the same core marketed differently, so a dual core Opteron could easily be put into a desktop environment as an Athlon64. It may not be what they intended, but it should be easy to adapt if needed.
What exactly does AMD innovate?
AMD64. Doesn't that count for something?
AMD doesn't spend billions of dollars on research, so they take the best of what is out there and make good choices on how and when to use it. Laugh all you want. It makes good business sense for a company the size of AMD. Their innovation is putting all the pieces together into a product that can play across a broad market and be competitive with a giant.
So they are speaking to the point that Engineering has been working on this for a while.
That is what is sounds like. This eweek report didn't mention which core these dual-core chips are based on. I think we know it is Dothan derived.
Notably missing from the report is iAMD64
They'll have a version of Prescott with it in June, and Nocona will also have it. The implementation is likely poor, but these will at least support x86-64. At this point it is just a checkbox item until we start seeing some standardized 64-bit benchmarks. That won't happen until we get Windows. Sounds like Bill is finally starting the push.
With the info that is out there so far, it looks to me like AMD will be solid across the board except for maybe mobile all the way through 2005, and then k9 comes into the picture. This is going to be an interesting few years. I'm glad I'm long AMD at the moment and not Intel.
that gives new product in mid 2005.
I think if they started a derivative server part at the beginning of this year with a core that didn't have x86-64 in it, it wouldn't show up as a product until the end of 2005 at the earliest. It takes few months just to get a team organized and moving in the right direction, probably another 9 months to do the work to get to tapeout, and then at least 12 months from tapeout to production. I think 2 years at a minimum from start to production assuming all they did is add x86-64. I think I'm even being generous on the timescales. OEMs often take 6 months to do their own qualification for server chips, so it may not be in a product until 2006. The warning signs were there earlier as you point out. So if they started this back in early 2003, then mid 2005 is reasonable.
Intel isn't exactly known for their fast design cycle times either. They often take longer than other companies to do new and derivative cores.
What am I missing?
I'll speculate an answer to my own question.
Dothan could already have x86-64 in it. That would give Intel the bridge they need to get something out in 2005 that can compete with Opteron. I really think demand for x86-64 for servers/workstations is going to be huge in 2005, so much so that it could be a banner year for AMD if they don't have competition in that space.
My question to all is, what is keeping Intel from using Nocona in 4P and up servers? Is it simply a matter of compatibility with chipsets that support this? This could be a filler part until they get everything straightened out. I ask because if Potomac is cancelled, is AMD going to have the 4P x86-64 market all to itself until late 2005 or even 2006?
The real question is when did Intel start transitioning to this new strategy of using their other more efficient core. In the chip world, it generally takes at least a year to do even a simple derivative project, and then another 6 months or more after tapeout to get to production. If Intel didn't already start working on a Dothan based server chip with x86-64, it is going to be the end of 2005 or later before it shows up as a product. That looks like a big window for AMD. Also qualification times for server chips is a lot longer than desktop parts, so the window may be even bigger.
What am I missing?
Think about the implications of this. If Potomac is cancelled, that means Intel won't have any new Xeon MP processors on the roadmap until 2006.
I have to believe they already have something lined up with their other core for this application. Or perhaps they think they can push Itanium down into x86 space? That is just going to leave the door wide open for Opteron. I can't believe that Potomac is cancelled and they don't have a backup lined up for the 2005 timeframe. This could be huge for AMD.
It looks like HP is more than willing to take Opteron to the high end, over $25,000
As a long time AMD investor/trader, I find this really stunning from a historical perspective. I keep seeing $$$$. Sooner or later this is going to have a large impact on AMD's bottom line and with it a revaluation of the stock.
Dothan CPU + 2 MB = 87 mm2.
I have to say Intel has impressive cache density. AMD really needs to work on that.
They were "A" step devices and operated at 2.8 Ghz
Thanks for the data point. I guess my theory of them pushing the transistors is flawed unless they did it from the start. This may indicate 90nm does have some issues in general. We'll get a better idea when Dothan arrives.
all the crap (I mean stuff) that Intel threw into the design and is not bringing any value to the customer yet
I still don't buy this theory. They could have statically tied this logic off to be inactive or had it dynamically disabled. I guess the transistors for this unused portion of the chip would still leak, but I can't see this accounting for more then 5-10W. Leakage power isn't that bad, yet (or is it?). Even with a 10W spot, Prescott consumes too much power.
Do you think that Intel has learned something critical in working with Prescott design and the 90nm process such that in the future parts like Dothan
My guess is the initial Prescott clocked very slowly, and on a subsequent revision they intentionally pushed the transistors to get more speed and thus blew out the power budget. What else could they do without a major redesign? They certainly would have trouble shipping a Prescott if it topped out at 2.4Ghz.
I don't think AMD is limited in frequency as you suggest. AMD's cores are more like Dothan, where they get more performance/hz by using less pipeline stages. More gates per pipeline stage means less frequency.
That said, I do think Intel has an overall transistor speed advantage in their 90nm process, but they blew it with Prescott by having a poorly optimized design and as a result have to operate the process on the bleeding edge. I think AMD may actually be better at designing and optimizing chips with a given process, but Intel still leads in many aspects in process development. I wonder what a combination of AMD's design + Intel's process would result in.
What the heck do the Dothan and Prescott have in common
other than their process? These are vary different designs
in many ways.
I have to side with you here chipguy. A lot of people here are assuming a 90nm transistor is a 90nm transistor, but that is far from the truth. While it may be that Intel has more leakage in general on 90nm than they anticipated, the design and usage of the transistors themselves have a lot to do with leakage characteristics of a chip. Prescott may be using bleeding edge leaky design because it had to for frequency results, and Dothan may be well within the safe zone where leakage is kept in check. Dynamic power will be vastly different too. Dothan seems a lot more efficient. Less transistors, lower voltage, lower frequency, similar benchmark results. Sounds like a good chip.
Another point is Intel's 90nm process is going to be improved over time to be less leaky while improving transistor speed. It could be it started out highly leaky, but things may be much more under control now. This is assuming the problem is a general 90nm process problem which may not even be the case.
Individual FETs are aware of excessive operating temperature that may be caused by circuit organization and operating frequency.
Now that is a very good point. High temperatures change the static characteristics of the transistors. Thermal runaway is certainly possible. It really looks to me like Prescott is walking a fine line. I guess it is a good thing they ship with thermal protection to prevent this.
think you are not taking leakage into account. Each process seems to have a frequency range in which power consumption is fairly linear and then hits a point where leakage becomes a larger issue
This high static leakage point comes when the transistors are pushed too hard to squeeze out more switching speed. Remember Dothan uses a different microarchitecture which uses more gates per clock, but this does not tell us anything about how the transistors are designed. The transistor design between Dothan and Prescott may have similar layout and switching speeds, and may therefore have similar static power characteristics.
But it may also be Dothan was implemented such that it can use very few aggressive and leaky transistors to meet its frequency targets, in which case it could have less power lost to static leakage.
So I think you are right that we shouldn't assume Dothan and Prescott will have similar problems, but it may just be that Dothan is a better designed chip. Prescott designers may have pushed the transistors hard just to get barely competitive speeds out of it, but it may not tell us anything about the overall health of Intel's 90nm process.
There is also the possibility that Intel's 90nm process is very leaky, in which case we should see some power problems with Dothan, but it won't be as bad as Prescott due to lower frequencies and voltages keeping dynamic power down.
We'll know soon enough, but I would bet the problem is mostly in the Prescott design, with a small dabble of general 90nm process leakiness thrown in.
I think your right, but I"m a worrier.
There are a lot of rumors of Nocona not being too good, but I'm also one to wait for facts. I guess Prescott shows us many good facts that it isn't going to be very good.
I think the bigger worry is Intel's apparent switch to using their other more efficient core going forward long term. The good news there is these are stuck in mobile form for a while.
I still can't believe AMD is trading around $16. All signs point to a glorious 04 and 05. I guess investors are taking the 'prove it' approach after being burned in the past. That Osha report was so full of it.
Furthermore, why introduce a DUAL Core
Further penetration into Itanium space would be possible with a glueless 16P system, but I agree it is overkill for the moment. Is anyone working on a coherent hypertransport switch to allow >8P with current Opterons? I think Sun hinted at it, but I haven't seen any real reports.
step in with an healthy 90nm process
I hope this happens sooner than mid 05. I would like to see some results here soon. I've been waiting patiently through the delays. My heavy AMD investment depends on this. Fortunately Intel has bobbled 90nm (or at least the parts running on this process) much more than I would have ever imagined possible.
Yes, we've known this for a year or more.
Thanks. I guess I missed that. I know they had discussed doing it, but I didn't realize they had planned early on.
I guess this means glueless 16P servers would be possible with these, since glueless 8P is possible now? Wouldn't that be something.
Looks like AMD planned for dual core in k8 all along...
This would really be a killer part. I wonder when we'll see it? I would guess mid 05.
HailMary, your example is flawed, because you overestimated the shift in revenues from CPU to Flash by a factor of 5!!
I did that for illustrative purposes!
CPG -2%
Flash +2%
If CPG revenue is down 2% and Flash revenue is up 2%, overall profits could still be down, even if both groups increase margins slightly. That was all I was trying to point out.
If the Margin were 60%, the profit would be down $30M on a revenue reduction of $50M.
Thanks for the correction. This further illustrates my point that revenue can be flat, individual group margins can be up, and profit can be down, which is why I think Q2 will be roughly flat profitwise.
Can you say $19 this week?
I said $19 last week, but it didn't seem to make any difference. :)
You can agree or disagree with his analysis, but this doesn't conflict with his thesis, which is that *margins* will improve
As you pointed out in another post, the memory group margins are not as good as the computation group. I think it is about 30% for the memory group vs. 50% in the computation group (I used incremental earnings to get a ballpark figure here).
Here is a scenario that has flat combined revenue and increased margins for both groups, but also has flat combined profit due to shift of revenue share from computation group to memory group:
Q104 Q204
CPU Revenue $571M $521M down $50M
CPU Profit $67M $47M down $20M using GM of %60
Mem Revenue $628M $678M up $50M
Mem Profit $14M $34M up $20M using GM of %40
Tot Revenue $1199M $1199M
Tot Profit $81M $81M
Earnings $90M
EPS 24 cents
Q2 is the toughest quarter in the CPU business.
In the conference call they said processors would be down due to Q2 being seasonally slow, but flash would be up. They believed these would balance out and result in a flat Q2. I doubt we'll see much more than $.15 in Q2. I would love to be wrong.
Q3 and Q4 are another story altogether. I expect all the things you mention will be recognized by then.
Count me in for back loaded $1.00/share this year, and at least $1.50/share next year. I think we'll see all time stock highs by the end of next year (05). I was mostly a trader in AMD, but now I'm a long term holder.
Welcome to the board.