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Re: sgolds post# 33204

Wednesday, 04/28/2004 11:56:37 PM

Wednesday, April 28, 2004 11:56:37 PM

Post# of 97555
think you are not taking leakage into account. Each process seems to have a frequency range in which power consumption is fairly linear and then hits a point where leakage becomes a larger issue

This high static leakage point comes when the transistors are pushed too hard to squeeze out more switching speed. Remember Dothan uses a different microarchitecture which uses more gates per clock, but this does not tell us anything about how the transistors are designed. The transistor design between Dothan and Prescott may have similar layout and switching speeds, and may therefore have similar static power characteristics.

But it may also be Dothan was implemented such that it can use very few aggressive and leaky transistors to meet its frequency targets, in which case it could have less power lost to static leakage.

So I think you are right that we shouldn't assume Dothan and Prescott will have similar problems, but it may just be that Dothan is a better designed chip. Prescott designers may have pushed the transistors hard just to get barely competitive speeds out of it, but it may not tell us anything about the overall health of Intel's 90nm process.

There is also the possibility that Intel's 90nm process is very leaky, in which case we should see some power problems with Dothan, but it won't be as bad as Prescott due to lower frequencies and voltages keeping dynamic power down.

We'll know soon enough, but I would bet the problem is mostly in the Prescott design, with a small dabble of general 90nm process leakiness thrown in.

HailMary

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