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Elmer:
Only server customers validate for themselves, not OEMs. It takes about a year to go through that. They didn't get 45nm samples for about a year. They got some last month and will validate operation and perform benchmarks in their environments with their loads and configurations.
Remember that the P3-1.13 went through OEM validation and such. A single customer built a Linux kernel and it crashed. After many got involved, it was found that a simple default kernel compile crashed at 1.13GHz and worked at 1GHz. That is why, server cstomers do their own validations. No OEM tests in their environment, their loads and their configurations.
Pete
Wbmw:
NO you don't "GET IT".
Wolfdale is vaporware at this point in time. When (and if) it arrives then that would change. AMD's 90nm Opterons beat Intel's 65nm Conroes at 4P and at 8P, TODAY. And AMD's lead in performance per watt will be extended in 65nm. The current performance per watt leader in single threaded tasks is AMD A64 X2 3800+ EE.
The relevant part is that Intel just paper launched 16 CPUs and you can't bring yourself to admit that. Intel just shot down your old argument that Intel only hard launches.
When, and if, Wolfdale becomes available, we can then compare them to AMD's offerings at that time and not those of a year ago.
Pete
Jay1000:
It crashed in the middle of December 2006. It corupted the disks so bad, they had to be reloaded from scratch. A complete rebuild to disk was necessary and that took all day. It was in place since April, 2006 or about 8 months. That is a data corruption crash. Not a simple disk, controller, memory or CPU failure, but corruption of data and loss of about half a day of it (from the nightly data backup). The latter two scares any IT department. Since it wasn't a mission critical server, it was allowed another chance. If it dies again the same way, no Conroe based server will be allowed here. Its too much of a chance to allow.
12 hours of data in a mission critical server is worth $12+ million in some shops. A corrupting server just isn't worth any increase in performance against that.
A crash that just needs a reboot, with a loss of a minute of data, at most, is bad, but nowhere near the above. For the crashed server's place, a reboot would cause no loss of data and a short work delay (2 minutes and 31 seconds after last software update). Why do you think Microsoft's Windows 2003 Advanced Server OS would be tolerated otherwise?
Pete
Elmer:
It takes server customers a whole year to validate a server platorm. So far, no Conroe MP platform has been validated. Opteron MP platfoms have and are bought in droves with over half of the market. And massive MP customers are buying Barcelona as it contibues to go into those at an accelerating rate.
Pete
Wbmw:
We have all heard the it will come later argument. The other side always says "WHEN?" To which is replied by "SOON!"
You didn't give us the benefit of the doubt, so why should we? QX9770 was to be out now too and it has slipped a whole quarter.
And by {i]"Brilliant", Pete. As they always have, your arguments stand on their own! <G>, you have proven that your arguments don't hold any water.
Pete
Elmer:
I saw a Conroe crash in front of me and it corrupted the disk during that crash. You may fluff that off, but to me that is very serious. But to give the benefit of the doubt, I will allowed it another chance. It crashes like that again, and it will be deemed unfit for any further server use. It wil go into the recycling bin.
Data corruption is extremely serious. Any CPU suspected of that would never be allowed in the server room. Most shops have a zero tolerance policy on data corruption. And errata 298 is not a data corruption bug like Conroe errata 124. That errata exists in Wolfdale and all 45nm Intel CPUs.
BTW Validation never really ends. Any time the servers crash, the problem is tracked down. If it is traced to the CPU. immediate replacement is called for (bad single CPU). If it crashes again for that cause, that CPU family is invalidated. When the family is fixed, validation is gone through completely again. One mission critial or two normal server untraceable crash(es) will invalidate the whole server line. Intermittent bugs are hard to trace and sometimes impossible to. That is why untraceable bugs are so feared. IT people hate crapshoots.
Pete
Wbmw:
Intel's Wolfdale is missing. Unavailable products are just mist. 16 products launched, none available. A classic paper launch. Its the old, "we'll get it to you real soon now!" Typical Intel refrain when they don't have any to sell.
And a bird in the hand is worth 100 in the bush. You can't run stuff when the CPU is missing. People would rather have a CPU, than none at all.
That's why Wolfdales are cold, they're plain flat missing.
Since when do you compare a year old CPU to one that is not even out yet for power? Why didn't they compare the 6400+ power consumption? Or the performance and power of that 65nm BE A64 X2 5000+ CPU? And add the NB's FSB and ODMC's power to the CPU? Because it would make the comparison more fair and show that the AMD isn't HOT. And comparing likely cherry picked parts (better for Intel, worse for AMD) doesn't make for good comparisons anyway.
Lets turn it around and compare the A64 X2 BE 5000+ to the last 90nm DC P4 top end. The BE blows it away on most benchmarks and the P4 is way HOT, thus all Intel CPUs are HOT and SLOW. That argument sounds so bad. Its just how yours sounds. Like comparing apples and grapes.
A year old single 6000+ sample may be HOT. I know of one X6800 65nm DC Conroe sample that used 124W on a benchmark test. It was only 2.93GHz and doesn't perform all that well using the UT3bench bot match compared to a A64 BE X2 5000+. But it is very HOT by your argument (and that didn't include memory controllers or FSB from the NB) compared to that 5000+, so thus all Conroes are HOT and slow.
Generalizing something on one (suspicious) test on one sample, yields very a very poor argument. Typical for you though.
Pete
Snowrider:
You get an F for poor reading comprehension.
The answer to your question is that Intel's 45nm process is broken as far as producibility goes. They just paper launched 16 45nm CPUs. According to Intel boosters, that is a big sign of a broken process. I say it shows a broken design needing a respin and Intel doesn't want it bandied around that all their 45nm CPUs have a system crash bug that needs a respin. AMD took the heat by publically admitting it. Intel tries to sneak by. They have learned little from the FDIV and P3-1.13 fiascos.
Given the secrecy, this errata likely can't be worked around. Or it could be worked around with a huge hit to performance (likely worse than AMD's TLB BIOS fix). What would happen to Intel if the new respin fails to correct the errata? A slippage to Q2 and a big loss of face. And if all current 45nm CPUs are affected? P3-1.13 in spades. If the bug is in Conroe CPUs? Disaster.
Even if all of this is design related, the 45nm process can still be poor as far as production is concerned. They are building 4 45nm fabs which is the same as how many 65nm fabs they have. The same output from the same size fabs yields the obvious conclusion that the 45nm process yields only as much as the 65nm process does per sqft of cleanroom space. And since the 45nm dies are quite a bit smaller than the 65nm ones, shows that the yield must have gone down (less good dies compared to possible dies) and/or the wafer throughput is much lower (less wafers per week).
So the answer to your question is obviously, NO!
Pete
Wbmw:
Where can you gat a E8500? There is no listings showing any are in stock anywhere. OK, samples might be available to reviewers and OEMs, but that isn't available. Even Intel lists them as "January 2008", not "Available" as they do for any shipping CPU. I see from SI the earliest one estimated to be available is 1/31/08 and it isn't the E8500.
Thus for available CPUs, none are faster than what Intel already is shipping. And it will be that way for quite a while. And Kuma is in the "foreseeable future". So is the 65nm A64 X2 5600 at 2.9GHz (to be released this month IIRC). So your statement is wrong on the face of it.
Why didn't Xbit test the 6400+ under load? They were benchmarking it on all of the other pages. Perhaps it got quite a bit less than 114.6W. BTW, that is likely the 6000+ Xbit labs has had for over a long time (about a year IIRC). And oh did they add in the memory controller and FSB power to the Wolfdales? NO! Nice comparing apples to grapes. They could also have used the unlocked black edition A64 X2 5000+ and just upped the clock multiplier. I hear that many of those get to 3GHz fairly easy. This one got to 3.396GHz and at 3Ghz didn't use much more power than it did at 2.6GHz:
http://www.neoseeker.com/Articles/Hardware/Reviews/athlon_x2_5000_black_box/12.html
Notice how the 3GHz settings beats a 3.2GHz 6400+ on the other pages. So it at 3.396GHz uses less power than a 6400+ or the older 6000+ that Xbit labs used for its power tests.
So why did Xbit not test against the best 65nm AMD CPU?
And are you forgetting about 45nm Shanghai in H2 2008? You did forget about Kuma in Q2. So your "foreseeable future" is so filled with blind spots, no one should take it without diving into the Milwaukee DPW's pile of road salt.
Pete
Snowrider:
All this 45nm prowess you talk about, yet Intel can't make a Blu-Ray or HD-DVD decoder without using a third party:
HD DVDa and Blu-Raya support with an optional third-party decoder.
http://www.intel.com/pressroom/archive/releases/20080107comp.htm?iid=pr1_releasepri_20080107m
Could this be an ATI decoder? Which is why they don't want to name the third party. If it was nVidia, I think they would have named them.
Your first link still talks of the QX9770 which is still not released and won't be until later this quarter (it was supposed to be available at CES now).
Later this quarter, Intel will continue its progression of leading-edge technology leadership products:
o The Intel® Core 2 Extreme QX9770 Processor (3.2 GHz/1600 MHz
http://www.intel.com/pressroom/kits/events/ces2008/CES_FactSheet.pdf
In fact, today they only released slower Penryn based duals and quad cores. Real good 45nm production. Having to ship slower ones, so the sweet spot must be lower than the old bins. Typically not done for a "good" process according to Intel boosters when AMD did it.
The second link also shows dual core processors not yet available. Intel just says "January 2008". And the "new" quads core CPUs are "Q1 2008". 16 45nm CPUs announced, no higher speed ones yet available. Real good process, eh?
So the Xbit labs article compares shipping and available A64s against not yet available Penryns (Wolfdale). And why do their power tests use the old A64 6000 and not the less power hungry and faster 6400? Likely Intel strongly suggested them to do it.
Anandtech's link just compares the, later to be available, Penryns against the current Meroms.
The fourth link is just a rehash of Intel's press release. They announced CPUs that are not yet available. This is a classic paper launch. I just looked at Newegg and none of the announced CPUs were for sale.
<sarcam on>Real good 45nm process.<sarcasm off> Can't get enough to have availabilty upon announcement. Intel boosters used that to denounce AMD's 65nm process, so you shouldn't have a problem when the shoe is on the other foot and the same argument is used to denounce Intel's 45nm process.
That does not mean the few that Intel makes available to reviewers are bad, just that they can't make enough for a hard launch.
Pete
You do know that this is the AMD thread? Why don't you go to the Intel thread and complain, if he posts there?
Intel is having 45nm production problems. They don't acknowlege those. It reminds me of the P3-1.13 or botched gates fiascos.
Steeler:
Its you who can't understand. "Its possible" means they don't have one. Also the errata of "RSM instruction may restart the interrupted processor context through a nondeterministic EIP offset in the code segment, resulting in unexpected instruction execution".
Do you know what that means? Do you have a clue? That means the processor will set the instruction pointer to a random value and execute what it finds there. That is so bad I have a hard time seeing anyone not know what the implications are. The CPU is restored with a random value for EIP instead of the correct one. Even if it occurs once every 10^17 cycles, that is still 1 out of every CPU year. Thus you have a chance of losing everything of 4 times a year on a single socket quad core.
Given that it is likely something like that happened to one server under my control in 4 months, means that the chances are about right. The problem is that many of these are likely misdiagnosed as something else. Blame any software or hardware upgrades, blame Microsoft, blame the application code and blame cosmic rays. That is the standard OEM litany.
I remember a bout of finger pointing between the NCR hardware and software guys over six months on a dual CPU expensive super server. The hardware people said everything was changed out twice, so it must be software and the software guys said that their dual test systems do not exhibit the random lockups and data corruptions. It turned out that the hardware people never changed out the processor cache (it was a set of separate very expensive chips at the time). Once that was done, everything worked fine. Of course by then, the customer was so fed up, he wanted his money back and never used NCR again.
So don't tell me that a unlikely event can't cause major troubles.
Pete
Tecate:
You are wrong as Intel is the one who is lying more about this. There are show stopper errata on currently shipping CPUs that Intel papers over hoping that someone would not point them out. The OEMs are duplicit because the current fix, stop shipment of any affected CPUs, would devastate them. Worse would be a recall with CPUs with those errata fixed. Worst would be a recall without any C2D(,Q,S) CPUs to replace them with (they could use P4s, PMs and yes, K8s with MB swap to boot). AI124 is of the worst kind at this point.
Pete
Elmer:
If you would read Intel's errata page on AI124, there is no workaround. Thus it isn't something that can be bypassed, else they would say how there. However there is a vested interest in the OEMs for not showing this to end customers or pooh poohing it, when pushed. The mere fact that a stop ship or recall from Intel on C2Ds would be fatal for most of them. The service calls alone would bankrupt them unless compensated from Intel. If that compensation were awarded by Intel, it would be bankrupt very quickly.
How many C2Ds (C2Qs and C2Ss) are currently out in the field? Times how much per CPU replacement? That is how much a patch or workaround would be worth. They can get that service done mostly by the end consumers (BIOS updates or OS fix) hidden as a security patch. Yet the most critical errata don't yet have such a workaround. Those require a CPU swap (assuming that a stepping has that errata fixed). That is not the case for AI124 either.
So Intel coninues to ship hoping that they can explain away any occurances by pointing the finger somewhere else. "Its a Microsoft Vista (XP or Advanced Server) bug!" "Its a virus!" "The user did something that caused the error!" Anything, but "We f...ed up!" Problem is that one documented case by a non finacially bound third party, like what happened with FDIV, and the jig would be up. And this Barcelona dustup would be like a cough compared to a hurricane. People would be put on waiting lists at both the OEMs and at Intel for fixed CPUs bemoaning that it wasn't fixed yesterday.
Pete
Intel initially refused to replace affected CPUs until the stink from pundits, reviewers and customers became so bad that they finally offered after what should have been a no brainer from the start. It was such a fiasco that it is a classic case of what not to do in that situation. People do not want a CPU to get creative when doing well known mathematical calculations. When 4/2 doesn't equal 2, any computer will get fixed, pronto.
And much more than 0.1% chose to replace. The FDIV errata is still checked by OSes on every boot today. That is how bad it was.
BTW, Intel later stated that they had known about the problem a couple of months before it became public. When that came out, that practically destroyed any reputation Intel had. Talk about knowingly shipping tens of millions of defective CPUs.
So now you are blasting into AMD for going the extra mile and stopping the shipment while it gets the microcode patch out. Intel hasn't stopped the shipment of C2Ds since the AI124 errata was discovered. That is worse than the E298 errata in that it can cause the CPU to corrupt data and programs. There are quite a few C2D errata that cause memory ordering to fail, hang the system and disable CPUs amongst other things. There are a total of 78 errata not fixed in the current C2D and C2Q G0 stepping compared to 15 for the B2 stepping of Phenoms and Barcelonas. So if you chastise AMD for setting a high standard for clearing to ship, then you should be publically humiliating Intel for not stopping the shipment of obviously buggy CPUs. Heck, why is Intel so reticent on saying which errata they plan to fix? AMD comes right out and says which errata they plan to fix.
Wbmw:
I found this after 5 seconds on their web site:
http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/41322.pdf
No NDA, publically available and downloaded in less than 5 seconds directly from their web servers.
You should stop taking those Hallucinogenics and come to the real world.
I count 14 errata not fixed in B2 and one possibly not fixed with the last numbered 280 for the 9/07 list. Only 5 are not planned to be fixed. Intel's C2 OTOH G0 stepping has 78 errata that are not fixed (or apparently any plans to fix them). The last is numbered 124.
So AMD has publically available errata, isn't under NDA and has far fewer active ones than Intel. Three strikes, you are out, Wbmw.
Pete
Chipguy:
I have a AMD 3500+ system far longer than your E6700 system and it has had not one hardware related crash, runs quiet and is the second most reliable system I have ever owned. The most reliable (a Xenix server) had a AMD 386DX-40 that ran for 13 years and only crashed because the 13 year old 40MB RLL drive (1 yr warr) finally bit the dust. It had uptimes measured in years, longer than the E6700 has existed (a little less than 18 months).
Pete
Elmer:
C2D is even more broken if you go by the errata. AI124 is a show stopper. You have a server and everything is running fine and then comes a day where it just royally screws up. One single instance of that and many wouldn't touch it with a ten foot cattle prod. Some gamers and others might not mind rebuilding it from scratch every 4-6 months, but I am not one of them. Most like you would blame it on Microsoft or some one loading a crap software program. But the server I referred to was a server from a VAR and only had their software loaded on it.
The previous box was a P4 that ran for 2 years before the RAID controller went south. The VAR replaced it with a Core 2 Duo based server and it ran just fine for 4 months and then corrupted the registry so bad, that the server had to be rebuilt from scratch (reformat the disks, reload Windows, Oracle, Application code, configuration and data from the nightly backups). It took more than 20 hours to get it back online. There was no software loaded, no disk, memory, CPU or controller that went bad (tested and logs checked). It just woke up Monday morning as the users got to work and trashed the registry.
Can I prove it was errata AI124? No, but it fits the symptoms. And the same software, tools and OS worked fine on a P4. If it would have just hung, it wouldn't have cost much, 15 minutes as it was rebooted into the operational state.
Had that happened to a critical server for the business, that hardware would be blacklisted and never bought again. If that server does it again, there will be no Core 2 based servers bought here ever again. That is how bad a random jump CPU errata is. That is not meaningless. AMD's errata is on a different lower level. It doesn't corrupt a good working system. At least AMD will fix theirs. Intel won't fix a show stopper and that is far worse. Intermittent bugs are the hardest to find and fix for obvious reasons.
As for OEMs qualifying C2Ds, remember the FDIV errata? That didn't show up for a year and only because of a Mathematician who noticed it. Errata do slip through the cracks. And it was bought in the dozens of millions by then. And then there is the other classic case of the P3-1.13GHz. Intel downplayed that a linux kernel compile was an obscure application. It slipped through OEM validation, too. The only good thing was that Intel couldn't make many of them so the quantities were very small. IIRC, it took Intel six months to fix and more to get volume up.
So if Barcelona is broken, then C2D is busted. The fact that you don't like it is just too bad.
Pete
Chipguy:
Intel has a bug in all Core 2 CPUs including Penryn based ones, G0, that can "Shutdown Condition May Disable Non-Bootstrap Processors" (AI46). Prior to G0, they all have a errata, AI40, that can cause livelock "PREFETCHh Instruction Execution under Some Conditions May Lead to Processor Livelock". Errata AI87, can cause processor hangs even in 45nm G0 CPUs, "Unaligned Accesses to Paging Structures May Cause the Processor to Hang". Brand new CPUs verison M0 and G0 have errata, AI111, "BIST Failure After Reset". Errata, AI115, all versions, "Instruction Fetch May Cause a Livelock During Snoops of the L1 Data Cache". Errata, AI116, all versions, "Use of Memory Aliasing with Inconsistent Memory Type may Cause a System Hang or a Machine Check Exception". Errata, AI124, all versions, "RSM Instruction Execution under Certain Conditions May Cause Processor Hang or Unexpected Instruction Execution Results".
http://www.intel.com/design/processor/specupdt/313279.htm
And those are just the unfixed hangs and livelocks in Core 2 based CPUs. This is the current, 11/07 version of the Core 2 errata. There are memory ordering problems and erratic executions plus some bad addresses as well.
So why don't you have Intel recall these flawed CPUs? They crash from these design flaws and that includes all of the Core 2 CPUs in existance? Most of those errata Intel doesn't even plan to fix. That recall would put them out of business.
Pete
Elmer:
Don't like what you read?
Here's more:
"The four documents in question included an August 1990 internal memo summarizing Intel's litigation, two competitive summaries covering the math coprocessor market and an Intel news release discussing pending litigation. The issues involves AMD's right to distribute or copy the Intel microcode."
http://findarticles.com/p/articles/mi_m0EKF/is_n1960_v39/ai_13773225
More of Intel can't find stuff like with the current antitrust suit.
Pete
Windsock:
Again your (and Elmer's) recollection is false.
Most disturbing was how INTEL deceived the Court and jury during an INTEL lawsuit against AMD on the issue of 286 microcode. It was about the interpretation of the term "microcomputer" in an INTEL-AMD licensing agreement. INTEL altered the date of some crucial internal document and removed some incriminating text from it. The jury was deceived, and issued a verdict against AMD.
It was by some pure luck that AMD found the original INTEL document and the judge ordered a new trial four months after the jury verdict. With the untampered evidence, AMD won. But AMD lost precious many months marketing its own 486 processors due to an injunction issued previously as a result of INTEL's lawsuit.
http://sharikou.blogspot.com/2006/02/beware-of-intels-tricks.html
Tampering with evidence is conveniently forgotten about. The courts think such actions are quite vile.
n February 1982, AMD signed a contract with Intel, becoming a licensed second-source manufacturer of 8086 and 8088 processors. IBM wanted to use the Intel 8088 in its IBM PC, but IBM's policy at the time was to require at least two sources for its chips. AMD later produced the 80286, or 286, under the same arrangement, but Intel cancelled the agreement in 1986, and refused to hand over technical details of the i386 part. The growing popularity of the PC clone market meant Intel could produce CPUs on its own terms, rather than IBM's. AMD challenged this decision, and subsequently won under arbitration. A long legal dispute followed, ending in 1991 when the Supreme Court of California sided with AMD and forced Intel to pay over $1 billion in compensation for violation of contract. Subsequent legal disputes centered on whether AMD had legal rights to use derivatives of Intel's microcode. Rulings were made in both directions. In the face of uncertainty, AMD was forced to develop "clean room" versions of Intel code. In this fashion, one engineering team described the function of the code, and a second team without access to the source code itself had to develop microcode that performed the same functionality.
http://www.techliberation.com/archives/039730.php
The big money was $1 billion in 1991, not the paltry $58 million in the 1995 agreement.
Pete
Winsock:
Like I said, you like to revise history when Intel lost badly. Intel revisionists also have much incorrect data, but of course, you fail to see that.
April 15, 1993 Court granted AMD a new trial, finding that Intel had committed discovery abuse.
March 10, 1994 Jury in new trial returned verdict in favor of AMD finding that AMD had the right to use Intel's microcode in its x86 microprocessors through the 486 generation.
The biggie is that Intel failed to live up to its contracts. And that Intel lost a jury trial when Intel didn't get away from things that make courts quite angry (Microsoft did this as well). 12 ordinary people thought that Intel reneged and they are far less biased than you. This shows that Intel will likely lose the current litigation. Typical criminal behaviour, when caught red handed, lied to themselves, "I did nothing wrong!" or "I was framed!" It doesn't work.
AMD did not obtain the second source rights to the 386 -- period, end of subject.
awarding AMD a license to Intel IP embodied in AMD's reverse-engineered 386
Reverse engineering got them there. Reverse engineering is legal as you should know. Phoenix and AMI both did this wrt to IBM's BIOS, for example. So along with the ability to use microcode, AMD could build compatable 386s which makes for an effective second source. This goes to the 486 generation. Your stories have quite a bit of this revisionist info.
Pete
DrJohn:
Ever hear of a thing called patent portfolios?
Pete
Windsock:
More revisionist history. Here is the real deal:
"February 1992 Arbitrator found that Intel had breached 1982 technology exchange contract, awarding AMD a license to Intel IP embodied in AMD's reverse-engineered 386 and a two-year extension of the copyright and patent rights granted to AMD under the 1982 technology exchange agreement."
"December 30, 1994 The California Supreme Court decided that the award was correctly confirmed by the superior court, rejecting Intel's arguments that the arbitrator exceeded his authority. The decision reversed an earlier judgment of the Court of Appeal. This AMD victory was important because of the arbitrator's detailed findings of how Intel intentionally violated AMD's rights, and because it affirmed AMD's intellectual property rights in its highly competitive Am386 processor."
http://www.amd.com/us-en/assets/content_type/DownloadableAssets/AMD_-_Intel_Litigation_History.pdf
You are corrected with the real history.
Arbitrator found Intel in violation and awarded rights. Appeals Court disagreed. California Supreme Court overruled Appeals Court.
"suits between microprocessor giants Intel and AMD. Intel invented the ... of its version of the 386 chip and barred Intel. from further litigation."
http://jolt.law.harvard.edu/articles/pdf/v09/09HarvJLTech219.pdf
Intel lost so bad that they were barred from further litigation. Of course, Intel would like to remember it differently, hence the revisionist tendencies.
Pete
Chipguy:
I am calling you on your violation of the TOS. Try to keep it civil.
Pete
Elmer:
Typical Intel revisionist history. They have tried that dodge time and time again. It just doesn't work. They wanted the designs not to work and that tainted their valuations. Its easy to call other designs bad or unusable. Look at what they tried with x86-64. They called it all of those things. But it was a far better design than theirs. First, it worked. Second, it made sense. Third, customers wanted it. Intel's solution was piss poor. Their own P4 version didn't work by their own admission and their other one, IA64 was destined to fail.
Their revisions also don't allow for the mere fact that without IBM choosing the 8088, the worth of x86 would have been quite small as well. Without a second source, x86 would not have been chosen by IBM. Heck the 4004 would not have existed without Busicom. Perhaps Wintel would have been Digirola.
Pete
Chipguy:
Intel litigated and lost big time. Oh, but you have typical Intel revisionist memory and think it went differently. 68K wasn't unobtainable as I had one during the time in question along with a 68010 MMU. Worked quite well. What it didn't have was a 8 bit data bus version early on.
IBM didn't think segmentation until after the PC got very big. Before that it was more of a get it out quick. If they were thinking of segmentation and those issues early, they would have kept it closed and proprietory like Apple did. It was good they didn't look at it that way as the openess really allowed it to take off quickly and made them a lot of money. Proprietness and Microchannel showed that planned incompatability doesn't work. It didn't work for Apple very well either. People just don't buy limitations that well. It gets proven over and over again for each new generation.
Also trying to keep the microprocessor versions from taking over has failed time and time again. The IBM 370 and the micro370 version, the DEC PDP 11 and the LSI-11 version and the VAX and microVAX versions to name a few. Each time it was tried to slow the advance, it has failed either by destroying the company from within or doing it by others from without.
By the 386, IBM lost its leverage with Intel taking them out of the low end hardware and Microsoft stealing away the OS (heck they were founded on a crime, theft of intellectual property). Both Intel and Microsoft wrested control from IBM by updating out of them. Intel reneged on its contracts with AMD and were taken to task on those attempts. Perhaps IBM should have gone with the right choices, Motorola and Digital Research. They would have made more money in the long run. Eventually they went with Motorola and had success with them. They went with criminals and got burned.
Pete
I also notice that not one of those early reviews used a ATI Radeon GPU, especially one of the new 3850s or 3870s. Perhaps that would have done better. Doesn't the spider platform include ATI graphics?
Pete
My mistake.
I was thinking of the WE32K which was a RISC CPU. AMD had a bit slice RISC, the 29K, which I ran into on a dedicated word processor.
Pete
Ephud:
Intel comes immediately to mind. They broke contracts. Not once, but many times. IBM would not have used their CPU, if there was not an independent second source. Without that design win, Intel would have been an also ran or a fond memory by now. Motorola should have gotten that win as they had a far better CPU, the 68K. National Semi. would have been a decent choice at the time as well with their NS32008/16/32. Both were RISC CPUs with a well defined upgrade paths. AMD would have been a second source to either of them.
Those technicalities was Intel breaking the letter and spirit of those second source contracts. You would have howled, if say, IBM, refused to honor their initial contracts with Intel and bought all of their stuff from AMD.
Pete
Tecate:
AMD delivered its direct roadmap with its 2007 promises. They have had pull ins as well. Yet you want to hold them to a higher 3rd party standard. Yet when I hold Intel to that same 3rd party standard, you whine and complain that it is too strict.
You do this again catisgating AMD for demand exceeding supply. Yet when Intel has shortages because of demand exceeding supply, you whine and complain that its not the same. Well it is the same situation, demand outstripped supply (whether supply slipped or demand grew is not germane to the result). So AMD forecast 10's of K for Q3 and 100's of K for Q4. With demand exceeding that, likely it will make millions for Q1 making K10 a significant contributor to profits in Q1 as predicted in the Q2/07 CC. Even though third parties wanted it much sooner.
Pete
Tecate:
Any processor that is cancelled automatically misses all dates scheduled or otherwise. Politicians must love you as they constantly make "I will do xxx and yyy" and cancel those promises when they are actually elected. Your interpretation lets them off the hook because in cancelling a promise allows them to say "I didn't lie to you because that project was cancelled (when I got more information)." Most of the electorate would not say that. They would say "You promised us xxx and yyy and failed to deliver!" I call it a miss when a CPU P is scheduled for Qq/yy with features XXX and ZZZ and a CPU with feature XXX, but not ZZZ comes out Qq-1/yy and feature ZZZ doesn't show up for at least 2 quarters (or never).
Pull ins happened for Opteron DC (Supposed to be H2/05 and released 04/05) and the classics, Athlon 1GHz happening 6 months ahead of schedule which causes Intel to scramble to catch up causing the P3-1.13GHz big time screw up and the 1.2GHz Tbird also happening 4 months ahead of schedule. Then there are launches where a customer (tier one OEM) announces a CPU before AMD does (Turion MK36). And launches where a CPU is available for purchase before the launch (Opteron 240, A64 X2 3600+). And then there is a surprise launch, 3.2GHz 90nm A64 X2 6400+, totally unscheduled prior to it.
It is hard to see slips after this as AMD goes to what happens each year after this (2005). With one year glandularity, its is hard to see pull ins and slips of under 12 months. The vagueness both helps and hurts them in this regard.
One of the hurts is that third party roadmaps are used as the reference even though AMD doesn't have control of them. These are interpretations of AMD plans, but frequently the details are wrong or suspect. And it is disingenuous to force AMD to hold to them while not holding Intel to that same standard, but the easier more vague Intel published ones. Many Intel slips according to those third party plans are scoffed because they were not official Intel roadmaps.
Pete
Ephud:
Saying its out there and getting it to configure one are two different things. I tried all three linked web sites and they failed to configure such a notebook.
Schedule changes are either way. And pulling in a schedule while removing functionality isn't really a pull in is it? I mean you promise a CPU with X, Y and Z features for Q4, then pull it in to Q3 with only X and Z and then get it out with only Z there and X to follow later and no mention of Y anymore. That isn't a pull in, but a slip and a failure.
Schedule changes because of reorganizations are still changes. Changing the features also changes the schedule. The abive is one that you would claim as a pullin, but for those who were waiting fpr feature Y, its a flat out failure and a slip for those looking for feature Z. For example if Nehalem comes out in Q3 2008, but without an on die controller with Quickpath to follow later using the same FSB connected chipset, would you class that as a pull in? If Quickpath wasn't turned on until Q2, 2009? If it never has an ODMC? Sure a CPU with that codename showed up 2 quarters early, but it doesn't have any of the highly anticipated features. One gets there, but slips badly and a second is not ever to be found. I would not call that a pull in, but a sham, slip and a failure.
Tejas was scheduled and named. 4GHz P4 was to be present by 2003, then 2004 and finally, never. Of course with name recycling, getting a CPU with a code name does not mean that delivery of the original project happened either.
And given past history, AMD has had launches where the product was for sale long before the launch. So has Intel. AMD launched Opteron even without any Tier one OEM willing to sell systems. So if they are present in a "white box" shop, then it has immediate availability.
Your idea of immediate availability is that is in stock at Newegg. You have blasted Barcelona for not being there. By that criteria, the T7800 Merom hasn't launched as it isn't in stock at Newegg!
Pete
Wbmw:
Another revisionist recollection by you. Intel showed hyperthreading in a future Penryn and on its roadmaps at Fall IDF 2006, but it later retracted it. So for you, that means it was never there.
Pete
W bmw:
Have you tried to upgrade to a T7800? In all three web sites you linked, I get errors (Sony) or it fails to configure (HP and Lenovo). Evidently saying it can and actually getting one are two different things. I remember another time where Intel promised a CPU and it took 7 months before they showed up.
Pete
Wbmw:
The only one full of it is you, BS that is. You made a statement that has turned out to be quite false and you are not "man" enough to admit your mistake. Intel has failed to meet its own schedules, it has failed to deliver and is continuing to fail to deliver.
Pete
Wbmw:
So its BS when your errors are pointed out. Its BS when its shown you made false assertions. That is not BS.
BS is what is being pointed out. Your posts are BS.
Pete
Ephud:
Where is hyperthreading in Penryn then? Put out in Fall IDF 2006, retracted in March 2007. Phase change RAM sampling this quarter. Nothing. C2D T7800 launched 8/07, currently not in a single notebook, thus availability zero. Where is Foxton in Itaniums? Flat missing.
Plenty of examples, but Intel boosters conveniently forget that they happened because its not on the current roadmap or discussion point list.
Pete
Ephud:
There are lots of examples where Intel scheduled something and it never happened. 10GHz P4, Tejas and 4GHz P4 are examples. There are also examples where the roadmap updated and things moved around. And there have been pushouts this year as well.
One example is that Intel lauched a T7800 2.6GHz Merom in Q3 and there hasn't been one notebook with it (or even the earlier X7800).
Another is PCRAM (phase change RAM was supposed to sample now. Samsung has one sampling, but Intel is nowhere to be found.
http://www.dailytech.com/article.aspx?newsid=6371
And even pull ins are schedule changes.
But here is a direct quote of a roadmap push out:
http://www.dailytech.com/Recent+Intel+Tidings+Retractions/article5934.htm
So Intel did back off schedules over the past year.
Thus my contentions were correct and you and the other Intel boosters have to eat crow. Intel has no scheduling advantage or delivery advantage wrt AMD. Myth again BUSTED!
Pate