Tuesday, December 04, 2007 4:05:25 PM
Intel has a bug in all Core 2 CPUs including Penryn based ones, G0, that can "Shutdown Condition May Disable Non-Bootstrap Processors" (AI46). Prior to G0, they all have a errata, AI40, that can cause livelock "PREFETCHh Instruction Execution under Some Conditions May Lead to Processor Livelock". Errata AI87, can cause processor hangs even in 45nm G0 CPUs, "Unaligned Accesses to Paging Structures May Cause the Processor to Hang". Brand new CPUs verison M0 and G0 have errata, AI111, "BIST Failure After Reset". Errata, AI115, all versions, "Instruction Fetch May Cause a Livelock During Snoops of the L1 Data Cache". Errata, AI116, all versions, "Use of Memory Aliasing with Inconsistent Memory Type may Cause a System Hang or a Machine Check Exception". Errata, AI124, all versions, "RSM Instruction Execution under Certain Conditions May Cause Processor Hang or Unexpected Instruction Execution Results".
http://www.intel.com/design/processor/specupdt/313279.htm
And those are just the unfixed hangs and livelocks in Core 2 based CPUs. This is the current, 11/07 version of the Core 2 errata. There are memory ordering problems and erratic executions plus some bad addresses as well.
So why don't you have Intel recall these flawed CPUs? They crash from these design flaws and that includes all of the Core 2 CPUs in existance? Most of those errata Intel doesn't even plan to fix. That recall would put them out of business.
Pete
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