Advanced Micro Devices Inc (AMD)

[pgerassi]

Steeler:

Its you who can't understand. "Its possible" means they don't have one. Also the errata of "RSM instruction may restart the interrupted processor context through a nondeterministic EIP offset in the code segment, resulting in unexpected instruction execution".

Do you know what that means? Do you have a clue? That means the processor will set the instruction pointer to a random value and execute what it finds there. That is so bad I have a hard time seeing anyone not know what the implications are. The CPU is restored with a random value for EIP instead of the correct one. Even if it occurs once every 10^17 cycles, that is still 1 out of every CPU year. Thus you have a chance of losing everything of 4 times a year on a single socket quad core.

Given that it is likely something like that happened to one server under my control in 4 months, means that the chances are about right. The problem is that many of these are likely misdiagnosed as something else. Blame any software or hardware upgrades, blame Microsoft, blame the application code and blame cosmic rays. That is the standard OEM litany.

I remember a bout of finger pointing between the NCR hardware and software guys over six months on a dual CPU expensive super server. The hardware people said everything was changed out twice, so it must be software and the software guys said that their dual test systems do not exhibit the random lockups and data corruptions. It turned out that the hardware people never changed out the processor cache (it was a set of separate very expensive chips at the time). Once that was done, everything worked fine. Of course by then, the customer was so fed up, he wanted his money back and never used NCR again.

So don't tell me that a unlikely event can't cause major troubles.

Pete