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IPC is meaningless if you don't get the clock speeds. Just look at Opteron for instance.
So if IPC is meaningless does that mean that if Opteron had its IPC reduced (eg. smaller cache, fewer functional units) that would make no difference?
But P4 was designed to clock, with actual performance being pretty much irrelevant
Did you even read the reports I linked to from Haertel about how the process went? Actual performance was the goal.
Without recompilation, AMD64 will not give you more than 2 GB per process (in MS Windows) until Windows XP-AMD64 comes out, when the limit will go up to 3 or 4 GB. This is less than the 64GB max for PAE
Note that Opteron has PAE too. In fact it has PAE40 instead of PAE36, which allows for more RAM (if you can find a motherboard with enough slots and an OS that supports it).
However, the design team - by his admission - was motivated to architect for high MHz to keep competitive to Athlon.
The crucial difference is that they went for high MHz in order to achieve high overall performance, not in order to have a figure that sells. It's on the one side "GHz sells" vs. on the other side "Performance sells and the Alpha/RISC experience tells us that GHz lead to performance". That's quite a difference.
Sheesh, I feel less like an AMD partisan by the minute!
Madison - a chip that the AMD partisans feel inclined to label as having "sucky" performance.
I think it would be better if we tried to avoid assigning opinions to others - or do you have a link to someone on this board saying this?
Please state it clearly - why do you think that Intel's queue design in the P4 was for any reason other than an impressive and misleading clock rate?
I think I'm going to have trouble stating it more clearly than "They did a high MHz chip because that was the best way they knew to get high performance." Isn't that clear?
Or I could quote Haertel again. I'll paste it in, since you give the impression of not having read it first time:
Mike Haertel wrote:
> Bernd Paysan wrote:
>> Or maybe the marketing manager said "[...]So go that
>> far, and we'll always be ahead of AMD in terms of
>> GHz. GHz sells, performance is not that important."
>
> I assure you, that is *not* what happened at Intel
> with the Pentium 4.
It seems you'd rather believe your own conjectures than the reports from eye witnesses.
My claim was (and is) that when Intel cut features from the P4, they made sure they were left with a large queue design that they had to know would perform poorly with respect to the (otherwise impressive) clock rate.
When they cut features they made sure they were left with a design that still clocked high. What would you have had them done? Cut out functional units to save space, then slow down the clock to avoid confusing the consumer?
If you (at a late stage) realise that you are out of die space budget, it seems pretty obvious (to me, I'm not a chip designer) that you are not going to be able to save a lot of space by lowering your MHz target. That would mean redesigning large complex units. Instead, they reduced the number of units and fixed it up again in microcode, eg. by doing imul in the FP unit.
Rather than focussing on how the P4 performs relative to clock, try focussing on how it performs relative to what Intel could have done.
Here are the links again:
http://groups.google.com/groups?selm=slrnb5b5rf.1igv.mike%40ducky.net
http://groups.google.com/groups?selm=slrnb5c1p7.1j1d.mike%40ducky.net
Releasing a low IPC design at souped up clock rates was a cynical play to public perceptions
You continue to believe this even after reading the links I gave you, or you just prefer not to let facts get in the way of your preconceptions?
Lots of good info for those that read German on http://www.heise.de/ct/03/15/023/
Amongst other stuff the estimated SPECintrate for dual Opteron 246 is 30.3, which looks like it might be top of the hill:
http://www.spec.org/cpu2000/results/res2003q2/
Can Itanium 2 6M beat that? It seems not, judging by the 8-way Altix figure of less than 100. Can't find any figures for 2-way Itanium II 1.5 6M SPECintRate.
More Yamhill rumours:
http://www.theinquirer.net/?article=10470
Also, SMT, CMP Prescott, MS-Intel spats, Tejas not taped out.
Also reiterates the Inq's opinion of Prescott frequencies and launch dates.
Athlon64 is being fitted with DDR-II. Perhaps the core is being reworked...maybe a couple more stages. When the real Athlon64 shows up it's going to be a lot faster.
Sounds like wishful thinking to me.
Let's look at the facts in the matter:
* DDR-II isn't ramped up yet, so launching a mass market CPU for it seems premature.
* The 2GHz Opteron is late, and according to the Inq rumour "we have been having a bitch of a time ramping speeds" http://www.theinquirer.net/?article=10254
* Rumours of dual channel A64s are getting harder to overhear. If A64 was a 3GHz clockability miracle then AMD would have performance to spare and could save money on the motherboard/socket front.
So that doesn't look too good to me. I expect an A64 launch at 2.0 and 2.2GHz, probably with DDR-I-400. Putting in an extra pipeline stage or two doesn't sound too likely, since it could easily be a huge amount of work and we have zero rumours to suggest it is happening.
Osha upgrades Intel
http://biz.yahoo.com/rb/030714/markets_stocks_2.html
Looks like Athlon64 on socket940 is pretty much confirmed now, so do you regret your harsh words on the Inq when they got a scoop on that story?
Here's a nice collection of Opteron and A64 boards. If you click on image 2 of the K8D Master2-Far board you can see it is a socket-940 board for Opteron or Athlon64. From image 4 it appears it is single or dual with Opteron, but single-only with Athlon64.
http://www.amdboard.com/opteron_boards.html
there is a strong possibility that AMD is taking some non standard steps to enhance binsplits at the expense of yield. When forming transistors there is a target size for the channel and controlling it defines, in part, the limits of a process generation. [...] But this is not on a die by die basis
Would it not be possible to do a short run of wafers with a smaller channel size? Yield would be poor, but the chips that worked might be expected to run faster. Let's say you wanted a handful of fast chips for demo purposes that would be one way to do that.
I don't think cherry-picking would be a good word for it, though.
I honestly don't understand why Intel doesn't sell the Banias CPU and Centrino chipset for a lot less. It would do a lot more damage to AMD and they would sell twice as many. Limiting it to the high end means that they are basically competing with themselves, since AMD has almost zippo market share in notebooks over $1,800.
It seems to me that by keeping Banias in its own high end niche they precisely avoid competing with themselves. A cheaper Banias would take market share from mobile Celerons and mobile P4s. Of course it would also take market share from mobile Athlons. It should be worrying for AMD stockholders that Intel doesn't think that attacking the mobile Athlon market share is worth it - is Athlon not a significant force in the market?
AMD is about to release the AMD64, and I expect that they will want it to have a clear performance advantage over the fastest Bartons
I really doubt that AMD would hold back faster Bartons for this reason. Consider that Barton is cheaper to build than A64, why would AMD want to force the market to move to a more expensive chip if the performance were the same? I could understand it if Opteron wasn't out and AMD wanted to get x86-64 machines into the hands of developers, but with Opteron and nForce3 out there and moderately priced (for a developer) there's no reason to rush A64 unless the performance warrants it.
In general I am sceptical about all theories that AMD or Intel are holding back much better technology for tactical reasons. Of course there may be situations where they prioritise yield over bin splits or vice versa, but they don't sit on higher speed grades for any length of time. That would be economic lunacy!
Here's another very informative link in the same thread.
http://groups.google.com/groups?selm=slrnb5c1p7.1j1d.mike%40ducky.net
It's not clear that the reason for the die diet was in order to rush the chip to market. It could just be because of the economies of doing such a big core. P4 was over 200mm2 even with only 256kbytes cache on 0.18um. In fact I think that's more likely, since the die diet must have resulted in some extra work, eg. all the logic for shipping imuls off to the fp unit, schedule them there, and ship them back.
Remarkably clueless analyst report:
Decision Dynamics
What factors should HP customers consider when migrating from PA-RISC to Intel Itanium architecture? We suggest the following:
· Understand the differences between CISC, RISC, and EPIC architectures.
I don't think HP customers generally need to concern themselves with this at all!
"This contrasts with tens-of-thousands of packaged applications that already run on Power and UltraSPRC platforms. What this infers is that HP users who want to migrate from Alpha, MIPS, or PA-RISC-based servers may have to wait until their ISVs port and tune packaged applications to the new Itanium EPIC architecture.
Someone buy these guys a dictionary!
Now clearly, it is important to check before you migrate that the apps you need are available for the new architecture. This should hardly come as a surprise for someone with half a clue.
Face it: The primary reason for the P4 queue design was to come up with a high MHz alternative to Athlon
To hear Haertel tell it that's not how it went at all.
They did a high MHz chip because that was the best way they knew to get high performance. At the same time they didn't want to sacrifice high IPC. Due to various stuff not panning out, the IPC wasn't too hot, so they had to put even more work into the frequency to make up.
http://groups.google.com/groups?selm=slrnb5b5rf.1igv.mike%40ducky.net
Somewhere else he mentions the 'last-minute' diet that removed some large elements from the P4 die. One of them was the integer multiplier. I think it's safe to assume that some of these elements are coming back in Prescott.
The MIPS processor I linked to is also HyperTransport-based.
You can run as full a Linux distribution as you like on a MIPS if you choose Debian, which basically has everything Red Hat has. Of course, for an embedded system you aren't going to want much of a standard desktop Linux installed - all the things you don't install you don't have to test!
Opteron as embedded processor? (It's not about this particular announcement, but just hinted by). Sounds strange?
Certainly does sound strange. I should have thought Sibyte's offering was a better processor for this sort of thing. On the other hand the Sibyte chip isn't out-of-order - perhaps it just wasn't fast enough for what they wanted.
http://www.sibyte.com/mercurian/
the memo information published in the Inquirer looks very convincing to me
All the other references to the leaked memo that I have seen do not mention the IBM server.
The Inquirer didn't get a copy of the leaked memo directly, since they were not on the mailing list.
Intel isn't the invincible monolith, they still make stupid mistakes, too.
What makes them an invincible monolith isn't their lack of stupid mistakes. It's the fact that they have:
* More money than the Beatles
* More fab space than God
* A dedication to (and leading expertise in) the most successful ISA ever
* Dominating market share in many areas
They have made lots of mistakes much worse than this one in the past.
A number of folks are going to be furious!
Buying a motherboard now for an upgrade to a CPU later is always a losing proposition. It just never works. A number of people are going to discover that.
People always want to make a future-proof hardware purchase. It just never works out.
The snowball starts rolling:
http://www.x86-64.org/lists/discuss/msg03806.html
Our work involves chip-design, typically w/ processes that have sizes >2GB
(often in excess of 4GB, but then we have use Sun boxen for it and pay the
price in time and money). In Linux, one can adjust the kernel/user memory
split up to about 3G/1G comfortably on 32-bit processors (and obviously,
the OS in 32-bit mode). We do this to get a bit more headroom for our
(large) jobs.
What I want to verify, is that on a box running a 64-bit kernel
(i.e. compiled arch == x86_64), a 32-bit user-space app will be able to
use all 4GB (or nearly all of it, perhaps AGP/PCI windows etc cut out a
small amount at the top). Our software vendors (closed-source) have not
released their x86_64 ports yet, so we will be stuck with 32-bit apps
until probably this fall. _However_ if we can get that extra 1GB of
memory (per process), it will help quite a bit in the short-term (and
probably spare us buying another Sun).
Of course, the answer is that they can use 4Gbytes of memory on a 32 bit app with 64 bit Linux. This will tide them over until the fall, when the ported app is due.
Debut in the Third Quarter, eh? Could that be around..... Oh I don't know..... say....... around....... September 22nd, maybe?
You think it's going to compete with a Athlon64, a desktop chip?
Or did you just mean it might debut at Computex?
Nothing to do with conspiracies. Try again.
Can you think of any reason why AMD would exaggerate this maximum power figure?
Of course, can't you?
The flaw in your logic is that there is no 64-bit market. AMD has to create one by making the software available and having systems to sell. A big question is how well they can market this, given that many apps don't seem to get a performance boost from the 64-bit instructions.
How about by concentrating ont he apps that do get a performance boost. Or is that too obvious?
(Of course for those apps that don't, and they seem to be in the minority, people can run the 32 bit version, but perhaps I already mentioned that).
If P4 can multiply 64-bit floating-point as fast as A64 can
Faster, actually, at least in 32 bit mode. For 64 bit mode there may be apps that benefit from the extra registers enough to make up for the MHz deficit.
But there was a game designer who wanted to use huge amounts of linearly addressable RAM to design 3D worlds for games (not for playing them). Forget the name, but he was enthusiastic about x86-64.
Given the proper foresight, I think it would have been better had Intel forced a 64-bit x86 architecture, instead.
I think they are making a better long term decision with IPF
It seems to me there is a contradiction here. They can't both be better decisions.
Intel is not AMD, so they do play by a different set of rules.
OK, so what should AMDs strategy be vis a vis 64 bits, since you don't like their x86-64 strategy?
Intel has never publically positioned the IPF family as anything other than a high end server
processor family
Do you still think so, given the link that was dug up saying they were going to make workstations with it?
Intel and HP disclosed basically nothing about their intentions for IPF
So do you still stand by that given the link that was dug up specifying that they would build workstations with it?
HELLO KEITH..... ARE YOU THERE???
There's a button at ther bottom of each post for reporting TOS violations. They are off topic for the board.
intel does say Itanium is for Workstations
They do, but are there any examples of Itanium workstations?
If you click on the Itanium workstation link you get to a page with further links to things like Racksaver and SGIs Altix.
I2 would likely also had lower memory latency.
But not more open pages and outstanding memory transactions.
OO execution can mask memory latency under some circumstances:
http://groups.google.com/groups?selm=slrnb8mijr.1v6p.mike%40ducky.net
Whatever the explanation, it seems a stretch to suggest that there is no app at all where EV7 is faster than I2. fma3d is an example, as I pointed out. You're not normally such a big fan of conspiracy theories.
You just don't give up, do you?
The compute nodes aren't running Linux. Other parts of the system (management, storage etc.) are.
Here's a flyer - buying SGI would be a good way
for Sun to grab a foothold in the IPF hardware market
Nope, it's still there: http://www.sun.com/executives/realitycheck/reality-021803.html
SGI's Altix Ready to Rock with Madison Itaniums
...
"In the first twelve weeks of sales, SGI had 63 customers who have acquired Altix machines."
http://www.cbronline.co.uk/currentnews/a28b625b2ad4be0380256d570018bc6d
Well, the SGI thread http://www.investorshub.com/boards/board.asp?board_id=1046 is kinda quiet, so I thought I'd post this here, it being Madison related.
What do people think? Is SGI a buy here, or are they about to do a tactical bankruptcy and start over with the old employees, old technology, new shareholders?
Disclosure: Long SGI, but ready to dump it again
A takeover target if IBM decide they underestimated I2?
European Union gives big subsidies to AMD, Infineon
Dresden in need of €uroAID
http://www.theinquirer.net/?article=10406
I was quite frankly shocked by the processor comparison data in this presentation. Clearly there
are factors here, real or artificial, that don't allow all the machines to perform up to their potential.
Since the 21364 does so well, shouldn't we be looking at the feature that the 21364 is so good at, namely having multiple outstanding memory transactions going on at the same time. In this scenario the app is a real cache-buster and spends its entire time waiting on small items from memory. So the machines that shine are the 21364 and (to a lesser extent) the Opteron.
Just an idea. This would make the apps rather unusual HPC apps in my book. They are mostly simulations of large explosions as far as I can gather from the info I linked to in this subthread, but I don't know the details of the algorithms they name.
I mailed the author of the presentation and asked him FWIW.
Why were I2 tests reported as "about the same as
P4@2GHz" instead of an actual number?
The real figures can be estimated from the graph on the next page. The I2 is actually much slower than the P4!
They mention that for another of their apps, the "Sam Key" part of SPECfp2000 turns out to be a good predictor. By this they mean "fma3d", written by Sam Key: http://www.specbench.org/cpu2000/CFP2000/191.fma3d/docs/191.fma3d.html
You can see on
http://www.spec.org/cpu2000/results/res2003q3/cpu2000-20030616-02227.html
and
http://www.spec.org/cpu2000/results/res2003q1/cpu2000-20030113-01917.html
that the Alpha (at only 1150MHz) is indeed faster than the Itanium 1.5GHz 6M (1364 vs. 1063 peak).