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Re: sgolds post# 8518

Saturday, 07/12/2003 3:13:05 PM

Saturday, July 12, 2003 3:13:05 PM

Post# of 97824
Face it: The primary reason for the P4 queue design was to come up with a high MHz alternative to Athlon

To hear Haertel tell it that's not how it went at all.

They did a high MHz chip because that was the best way they knew to get high performance. At the same time they didn't want to sacrifice high IPC. Due to various stuff not panning out, the IPC wasn't too hot, so they had to put even more work into the frequency to make up.

http://groups.google.com/groups?selm=slrnb5b5rf.1igv.mike%40ducky.net

Somewhere else he mentions the 'last-minute' diet that removed some large elements from the P4 die. One of them was the integer multiplier. I think it's safe to assume that some of these elements are coming back in Prescott.
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