Advanced Micro Devices Inc (AMD)

[Haddock]

there is a strong possibility that AMD is taking some non standard steps to enhance binsplits at the expense of yield. When forming transistors there is a target size for the channel and controlling it defines, in part, the limits of a process generation. [...] But this is not on a die by die basis

Would it not be possible to do a short run of wafers with a smaller channel size? Yield would be poor, but the chips that worked might be expected to run faster. Let's say you wanted a handful of fast chips for demo purposes that would be one way to do that.

I don't think cherry-picking would be a good word for it, though.