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Wbmw -
Elmer, I guess I don't understand how AMD and UMC can "amicably wind up their joint development relationship", and yet AMD still claims that they will have 65nm technology on 300mm wafers by the second half of 2005. Doesn't this mean that AMD will be doing this at Dresden, since they won't have the UMC fab to rely on? What about AMD's foundry plans? Are those out the Window? Will IBM become a foundry?
So many questions, so few answers. The Droid wet dream of a flood of Hammers bursting forth from AMD's and UMC's fabs seems a distant memory. The joint venture fell flat on it's face. Back to the drawing board. Now IBM will be AMD's savior. Where have we heard this before? It didn't work before so why should it work this time? I don't really think IBM wants to take on Intel in manufacturing. They're out of their league. Is SOI an HVM (High Volume Manufacturing) solution? I've never seen any indication that it is. One thing about the IBM mystic is that it's always been behind the scenes. IBM has been considered Intel's only peer in process technology but let's not confuse that with high volume manufacturing. IBM has never had to put their capabilities on the line for all to see. I don't think they will stand up to the challenge, assuming that one even exists.
EP
Alan -
The deal apparently marks an end to AMD's arrangement with United Microelectronics Corp., a Taiwan-based foundry with which AMD was to develop process technology and build a 300-mm fabrication facility in Singapore. Asked about that earlier partnership, an AMD spokesman said the two sides "are amicably winding up their joint development relationship."
Translation, they're both giving each other the finger as they go their seperate ways...
EP
Alan -
With Intel introducing strained silicon ahead of IBM, and the appearance that SOI is not all it was billed as, it appears to me that IBM is falling behind. As far as I can tell Intel and TI are the only remaining solo acts in process development.
I think it's a little premature to be religating IBM to second string process technology. Although I am not a process expert it looks to me like IBM can do some extremely sophisticated things. What differentiates Intel from IBM is that whatever Intel does it does in ultra high volume. They don't have a special receipe they only use for low volume high margin products where yields don't matter. So whatever unique exotic process IBM comes up with it shouldn't be construed to mean Intel can't match it. Intel only targets high volume manufacturing and there they have no peer.
EP
alan81 -
There was no way in my mind that AMD or UMC had the resources needed to develop a state of the art 0.65u 300mm process. With help from IBM they will get it done.
This is NOT good news for Intel.
I can't believe IBM needs AMD's help to develop a new process. The only thing that makes sense to me is that AMD realizes how far behind they're falling and is looking for more help. Who else are they going to ask? AMD is the one who needs this agreement and IBM is just doing it for the money.
EP
borusa -
Maybe IBM is seeing AMD results with SOI and want to partner cause they are impressed with the yeild.
Maybe AMD is seeing AMD's yields and calling for help?
EP
subzero -
I'd guess that AMD worked for over a year with UMCs technology - and finally came to the conclusion that Elmer did over a year ago - it (UMCs technology) is unacceptable for high performance SOTA CPUs.
Hmmmm.. Do we know you by another handle?
EP
John - Maybe the old date was a typo?
http://www.theinquirer.net/?article=7068
Sony seeks out Rambus for Playstation3 technology
Yellowstone lark likely for "Cell" processor
By Paul Hales: Tuesday 07 January 2003, 09:32
SONY AND TOSHIBA have both licensed memory technologies from Rambus, causing speculation that its technology could feature in future Playstation consoles.
(But see also, Playstation 3 architecture revealed)
Under the terms of the deal announced last night, Sony and Toshiba have licensed Rambus' codenamed "Yellowstone" and "Redwood" interfaces. These, says the controversial memory company, will feature in future broadband system applications, and the mooted new "Cell" processor being developed by Sony, Tosh and IBM.
The Cell processor is widely expected to form the heart of the future Playstation3.
Rambus says Yellowstone currently operates at 3.2GHz data rates - faster than DDR memories. The company reckons Yellowstone offers high performance in memory signaling while optimizing system cost through pin-count reduction and support for high volume PCBs and packages. Redwood, is the label for a ultra high-speed parallel interface between multiple chips, which Rambus says delivers a data rate about ten times faster than the latest processor busses.
While Sony wouldn't be drawn on the implications of the deal, Ken Kutaragi, president and chief executive officer of Sony Computer Entertainment Inc said "The use of Direct Rambus technology in PlayStation2 was essential for its performance." He added that the deal would allow Sony "to create a wide range of applications and platforms from high-end systems to digital consumer electronics products within Sony Group." µ
Pual's been at it again...
http://www.theinquirer.net/?article=7073
Polywell's Opteron server to debut at 1.4GHz
Reader of the Millennium becomes scoop
By Mike Magee: Tuesday 07 January 2003, 10:27
ALTHOUGH AMD partner Polywell pulled the specifications of its Sledgehammer based server from its Web site not that long after we publicised its products for it, an enterprising reader has discovered that the machine will launch using a 1.4GHz Hammer based chip.
See Firm starts selling AMD Opteron servers.
That enterprising reader was, in fact, ex Intel employee Paul Engel, our Reader of the Millennium, who likes to keep us on the straight and narrow on what's up with AMD processors.
Engel told us: "I called Polywell, and they admitted that the Slowpteron Servers will launch only at 1.4GHz. Doing Simple minded scaling, the AMD folks claimed the Slowpteron will do 3400 FunnyHurtz at 2GHz, so this comes out at 2380 FunnyHurtz!!!! AMD wants to compete with Celerons in the Server Space!!!"
In fact, AMD roadmaps we saw towards the end of last year indicate that the Sledgehammer will indeed debut at speeds of 1.4GHz but also at speeds of 1.6GHz.
As we revealed yesterday, the server will include Newisys system management. µ
* MEANWHILE HardOCP claims to have a price for the Polyraxx 1U2C of $9,450, and that they'll ship on February 10th. Seems a little early, and a little pricey, unless it's a fully configured system, but maybe AMD has ramped up its release schedule.
Spokeshave -
there is some logic to it, if you recognize that Intel's primary focus was to remain competitive with AMD at the highest speeds.
Intel only wanted to create the perception that they were competitive at the highest speeds, just like AMD is doing today. If the articles are correct they are only claiming that Intel ran a single production line targeting the very highest binsplits at the cost of yields. This does not satisfy the claim that Intel could have meet the demand for processors if not for yield problems. If you have one production line with less than optimal yield that does not mean that there were lowered yields across the multiple production lines in each of the multiple fabs.
Meanwhile the market is making a very nice runup here. Are you benefiting in any way? If AMD reaches $7.5 I will probably roll my Jab $7.5 call short position out to Feb or March. How about you?
EP
Spokeshave -
You (Wbmw)proclaimed those authors to be confused, and dismissed everything I, and they, have had to say with a wave of the hand.
Maybe he knows the answer to what those authors were only speculating on? Just a guess of course on my part...
EP
The problem with higher voltage is not just heat. The gate oxide can be damaged by high voltage. When comparing Intel and AMD process technology you will see that AMD runs at a higher Vcc but that's because their oxide is thicher and can stand the strain. Gate oxide thickness is a second order effect on performance. You want it as thin as possible while maintaining reliability. Intel could increase their gate oxide thickness but that would slow down transistor switching thus defeating the purpose. AMD would decrease their's if they could.
EP
Dew -
Although process is not my area of expertise I have observed that channel lengths are the first order effect on speed. Those transistor channels are determined by the lithography steps and the limits on resolution achievable in production. Squeeze down the channel lengths and the transistors switch faster but when you get to the reasonable limits of resolution you run the risk of going too far and the transistors won't turn off, thus the yield suffers. Additionally running at the ragged edge requires much more nursing than a production environment so the throughput suffers as well. The articles posted by Spokeshave suggest this happened to Intel during the CuMine ramp, although only on a small scale. I believe this is the cause of the poor output of AMD's Fab today.
As for heating up a transistor, it was just a phrase the author used. The transistor heats itself up. It doesn't need any help and temp slows down transistor switching. It's a bad thing.
EP
Dew -
Am I missing something?
Yes, you're missing the pissing contest!
Spokeshave -
Rumors and misunderstanding. A good example of how clueless these people are is the part about 70% yields for Willameete.
The paper claims that P4 was meant to be built using new machines which weren't delivered on time and the old steppers aren't really up to the task with yields of 70 per cent on the P4 compared with 80 per cent for Pentium III parts.
It suggests that's a bad thing. In fact 70% yield for a die that large would be fantastic and I'm quite certain nobody in the world is getting that, at least not in production. I would have thought you'd see that instead of posting it to support your statement. It does exactly the opposite. It proves the author doesn't know what he is talking about.
The other quotes are "sources suggesting" or mistaking binsplit for yield or the very early days of CuMine.
BTW, you left out this part from one of your quotes. It clarifies one unsubstantiated claim to be referring to a single line. Not volume production.
This is most likely what Intel has done: sacrificed one of their production lines to produce, relatively speaking, tiny amounts of low-yielding 1 GHz PIII Coppermines.
The part about the 1.13GHz recall was only a few 100s of units and clearly a binsplit rather than yield problem as well. None of these articles support your claim.
EP
Dew - Something for you [G]
Transmeta climbs into embedded market
By Michael Kanellos
Staff Writer, CNET News.com
January 5, 2003, 9:00 PM PT
Transmeta on Monday will release its first line of chips for cash registers, industrial equipment and other embedded applications in an attempt to diversify its business.
The Crusoe SE processors are similar to the company's notebook chips but will be incorporated into a wider variety of nontraditional devices, such as point-of-display terminals or in-car entertainment systems. Embedded chips typically perform a limited number of functions and run only a few software applications, but must be far more resistant to breakdowns and environmental hazards, such as dust, than PC chips.
The Transmeta chips fill a niche between products from ARM and MIPS, which are fairly popular in the embedded world, and processors from Intel and AMD, said Tom Lee, director of embedded business development at Transmeta.
The Crusoe SE line runs at 667MHz to 933MHz, faster than most ARM chips, but consume less power than competing Intel and AMD chips, thereby eliminating the need for internal cooling fans.
"The last thing you want is a fan. Reliability is king in this market," Lee said. "What you want is something that won't break down from grease being sucked into the French fry machine."
The chips also can run Windows and Linux software, he noted.
After a glamorous start, Transmeta has been trying to recover from a disastrous slide in 2001. The company's Crusoe 5800 chip was delayed several times that year, prompting Toshiba to cancel a Transmeta-based notebook for the U.S. market. Revenue fell to below $2 million a quarter, forcing the company to replace CEOs and lay off employees.
Although Transmeta continues to lose money, it managed to get the 5800 out the door in 2002 and is currently working on a new chip, called the Astro, which will debut later this year. Revenue also has risen lately.
The embedded market differs substantially from the PC market. Embedded chips typically sell for less than their PC counterparts and companies often need fewer chips. On the plus side, there are far more potential customers, Lee said.
Contracts also can run for far longer. Notebook manufacturers refresh their product lines every six months, requiring chipmakers to continually pursue new agreements. By contrast, a cash register manufacturer might sell the same model for several years, effectively guaranteeing a revenue stream to companies that supply its components.
To that end, Transmeta says it will promise to sell the same chips for five years, so that manufacturers won't have to worry about redesigning their systems or boards, said Lee.
The company will initially make six Crusoe SE chips. The chips will run at 667MHz, 800MHz and 933MHz. At each speed grade there will be a regular and low-power model, Lee said.
Spokeshave -
Intel's yields were notoriously reported to be poor both on the faster coppermine and the new willamette. They had the FAB "capacity" to meet demand. They did not have problems meeting demand because of a lack of capacity. They did not meet demand because of poor execution.
I am prohibited from commenting directly on Intel's yields but I will say that I am unaware of anything in the public domain to support your statement. I keep a close eye on the literature and publications and there is nothing I recall that you could base this claim on. Because of the passage of time, I will say that Intel's CuMine binsplits were poor by most standards at the highest frequencies, but this does not equate to poor yield. A device that does not operate at 1GHz could still operate fine at a lower speed. As for Willamette, because of the large die size you would expect a lower overall yield. The key metric here is defect density and there is no indication that I am aware of that would support your statement. As for capacity, I see this claim made over and over and it always seems to assume that Intel makes nothing but processors. You fail to realize that Intel is the worlds largest chipset maker as well as Flash provider. When you are doing your capacity analysis are you factoring in StrongArm and Xscale where Intel is taking over the PDA market? How about communications chips, microcontrollers, embedded processors and automotive? How about giving us an analysis of how you think Intel had the capacity to deliver CuMine and Willamette volumes while still meeting the other demands? I'd like to know how you arrive at that conclusion.
EP
Spokeshave -
I was just pointing out that when it is poor execution on Intel's part, you use the rather sickly sweet euphemism "capacity constrained", yet when it is poor execution on AMD's part, it is a "disaster".
During the last capacity constraint Intel's volumes were moving to the Willamette die. It was the large die size that constrained Intel's ability to deliver the volume needed to satisfy the market. We don't need to introduce a yield problem to explain the discrepancy. Even with great yields the die was too big. AMD's problems seem to be explained only by poor yield. In the final analysis is there a real difference? I guess it depends on your point of view. Did the process fail AMD or the architects fail Intel? Or maybe Management failed by not realizing the limits of design and process? This is what happens when you push the limit. You find out where it is...
Having said that, the transition to 90nm will be no cakewalk for Intel. They have screwed up a transition in the past, and it is certainly possible that they will do so in the future - especially since this upcoming shrink will involve not just the process shrink, but transition to strained silicon and low-k as well. It is certainly that Intel could be "capacity constrained" again in the future.
Intel can throw money at a problem. AMD can't.
Thanks for your thoughts Spokeshave.
EP
Today AMD may be facing the same problem.
That's because Intel's capacity constraints
Spokeshave -
Interesting that when it is AMD, you call it failure to execute and poor yields. When it is Intel, you call it "capacity constrained". Intel would never have been "capacity constrained" had they:
1) Executed the transition to 0.18 micron efficiently
2) Scaled coppermine better
3) Not had to recall the 1.13 Ghz fiasco.
First off, it's an easy exercise to calculate AMD's capacity to produce processors based on die size and the wafer capacity of their medium sized fab. Their fab has always failed to produce what one would expect assuming reasonable yields. We are forced to change our yield assumptions if we are to explain AMD's poor fab output. But to address your other points:
#1 It's true that the Coppermine ramp wasn't as smooth as hoped but that just proves the point. AMD made money because Intel couldn't deliver volume. Willamette was introduced on the same .18u process but by then it was running smoothly. Nevertheless, the market sweetspot moved to a higher MHz and CuMines no longer fit the bill. Willamette's huge die size created the capacity constraints. Incidently, it's looking like AMD will have to move Clawhammer to a larger L2 because of the poor performance of their original 256K L2 design. The larger die puts AMD back into a similar position Intel was in with the Willamette release.
#2 True again. Athlon caught Intel with their pants down and Coppermine couldn't scale to match. A position quite similar to where AMD finds themselves today.
#3 How true! You're 3 for 3! But that was a minor product volume wise, intended only for bragging rights.
Now, is it your position that the past predicts the future? That might be true if we had no additional datapoints but Intel's execution has been near flawless since the unfortunate events you point out. Meanwhile AMD's execution has been a disaster. AMD's fabs produce far fewer processors than they should based on die size and wafer capacity, and that's before trying to tackle an unproven almost experimental fab process.
EP
Spokeshave -
That IMO is a poor hedge.
You're right, it's not a very sophisticated hedge. It just that if Hammer is ever released and does well then my AMD will do well. If Hammer flops then my INTC will benefit.
As for your statement that AMD pretty much tracks INTC, well another perspective is that AMD only makes money when Intel is capacity constrained. While Hammer is looking more and more like it might be an oversized, under performing, poor yielding disappointment, Intel now has no reasonable limits on capacity. Prescott will be a major die size reduction and that plus the new 300mm fabs mean AMD will never again see Intel capacity constrained. Hammer must be everything AMD claims it to be or else. I don't expect these shares to track much longer. AMD will have more upside potential if Hammer delivers but it must live up to all the hype and not just on foils and datasheets. It must be a manufacturable product. A very difficult task for AMD.
EP
Did you mean Phlash. [g]
Oops! My typo. Thanks for phinding that...
EP
Dew -
If you are looking for a hedge for your INTC holding, TMTA might fit the bill better than AMD
TMTA isn't optionable and I'm only playing securities now that are optionable. AMD INTC QQQ at the moment.
And I hate to bring it up again but you never responded to my proposed bet on TMTA vs INTC over the next two years.
I thought I did respond. Anyway I decline your bet. Sorry.
EP
Dew -
That was intentional.
EP
Borusa -
Old impressions die hard. Maybe the future will be different for AMD. They have a fine Flash product line and even if processors don't turn out as they hype they can still possibly have a future. At these prices I think they are reasonably valued with upside potential. Speculative of course but a good way to hedge a larger INTC position. Happy investing!
EP
borusa
I got interested in AMD about 5 years ago and now am what may turn out to be one of "the bag holders".
Then you should be in a great position to understand the psychology. Assume the others think the same way. Rely on the long line of suckers and be the one they give their money to. If you are willing to just make money and not try to get rich then it can be a good play.
EP
Borusa
I still hold INTC but not enough to cover the naked calls I sold. I just don't see this market turning to the upside in any meaningful way in the foreseeable future. I am very confident in Intel's technology and future but that doesn't always equate to share price as we all know.
As for AMD, I learned long ago that there is always another sucker who is willing to take the place of the last guy who lost a bundle waiting for AMD to make it big. It's a psychology thing. Some people just can't resist a loser. Kind of like the battered wife syndrome. So at these prices there are lots of losers standing in line to throw away their money proping up this disaster. If they are so desperate to lose their money then who am I to deny them this opportunity? It's the least I can do...
EP
Wbmw -
I have a copy of the previous Athlon Datasheet and it doesn't list a 2800+ either. Its' Rev# is 25175E. This one you link to is 25175F. Nevertheless, what happened to the 2800+?
EP
bababouie
All they are saying is that this CPU will make your software run faster than previous CPUS.
They said more than that. They said that 64 bit computing allows the processor to process twice as much data at the same time. That's not necessarily true and it clearly left the impression that it would be twice as fast. As I said, that's marketing and I don't think AMD is breaking any new ground here. Just normal hype.
EP
There is currently a class action suit against Intel which claims Intel made false and misleading claims about the benefit of P4's clock frequency. Intel has deep pockets and is an easy target. AMD's claims are certainly every bit as misleading but whether they will be held accountable is questionable. Even if they are, both claims are just normal marketing, in my view. Should I sue if I don't get laid after using the newest mouthwash?
EP
It works from there.
I guess AMD has everything now. Everything that is except a product...
EP
John -
Here's what I get from that link...
Error 404 - Page Not Found
Page Requested: /us-en/assets/content_type/DigitalMedia/am..
--------------------------------------------------------------------------------
The page you have requested is either temporarily unavailable or does not exist.
Please check the path for errors and try again.
You may also try searching our site by using the form below.
First 16-way Itanium SPEC scores.
http://www.spec.org/osg/cpu2000/results/res2003q1/cpu2000-20021217-01897.html
EP
Wrote some naked calls on INTC Tuesday. Feb $20s. Bought INTC shares with the premium. Bought some AMD today and wrote Jan CCs. No I'm not down on Intel and high on AMD. Just trying to make some money.
EP
Intel has finally posted the SPEC scores for the 3.06GHz P4. As usual, the FP scores are world class and the INT scores are the highest ever recorded.
EP
http://www.spec.org/osg/cpu2000/results/cpu2000.html
Wanna -
Thanks for your comments. I would also add that Athlon64s or Hammers above 1.2GHz are still somewhat speculative at this point.
EP
Interesting look at Hammer:
http://www.digit-life.com/articles2/amd-hammer-family/index.html
More claims of Hammer SPEC scores and once again they are compared to a crippled P4.
Athlon 64 SPEC results out
For Screaming Sindy 2
By INQUIRER staff: Friday 27 December 2002, 10:01
OUR GERMAN READERS tell us that the first paper edition of c't magazine for 2003 contains some more benchmarks for the Athlon64 prototype they recently tested, along with code optimised for SSE 2 and using an Intel compiler.
There's a long list of results for SPECFP2000, and you'll have to buy the paper edition to see them all, but usually c't puts the results onto its Web site after a little while.
The magazine compares a 1.2GHz Athlon64 to a 2.2GHz Pentium 4, and here's a small flavour of the results:
168.wupise 782 (Athlon 64), 1025 (Pentium 4); 179.art 861 (Athlon 64), 367 (Pentium 4). The mag gives a SPECfp_base of 719 for the Athlon 64 and 677 for the Pentium 4.
It also publishes SPECintbase2000 scores of 755 for the AMD chip, and 774 for the Pentium 4.
Andreas Stiller wrote this piece. µ
wbmw -
Intel has done major demos on A-0 silicon. They did their 2001 IDF presentation on Willamette first silicon and they have done demos of Merced only 3 weeks after first silicon. If I recall clearly they also demoed a 4-way McKinley system very early as well. The point being that demos can be done on silicon several steppings at the very least away from production worthy.
If the current silicon is healthy enough to have had demonstrations run at multiple trade shows, and even healthy enough to have had benchmark run from several enthusiast websites, then it sure as hell wouldn't have so many bugs as to require the disabling of major features.
I guess it depends on what you think is major. Clearly demos can be done on silicon quite a ways away from being ready. And demos don't tell you if the process is ready. They could have gone through a lot of wafers to get samples and those wafers would have been nursed by their process engineers. That's a far cry from production.
Whatever AMDroid fantasy has Hammer production silicon getting major performance improvements over the current samples, has got to be one of the more desperate and optimistic notions I have yet heard.
That won't stop them from announcing major improvements...
EP
Thank you John and best to you too!
Spokeshave -
Please try to keep up. You missed the point of my post completely.
I guess I'm still missing it. What is it?
EP
wbmw -
You would know better than I but sending out samples with features disabled seems like a bad idea to me. Better to work around a bug, in my view, than turn it off. If you turn it off you block seeing any other bug that may be behind it. Also turning off the cache for hammer would prevent validating a major portion of it's capability, that being SMP. Just how much confidence can they have in a SMP environment that didn't use cache?
EP