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Re: DewDiligence post# 3297

Monday, 01/06/2003 1:37:01 PM

Monday, January 06, 2003 1:37:01 PM

Post# of 151696
Dew -

Although process is not my area of expertise I have observed that channel lengths are the first order effect on speed. Those transistor channels are determined by the lithography steps and the limits on resolution achievable in production. Squeeze down the channel lengths and the transistors switch faster but when you get to the reasonable limits of resolution you run the risk of going too far and the transistors won't turn off, thus the yield suffers. Additionally running at the ragged edge requires much more nursing than a production environment so the throughput suffers as well. The articles posted by Spokeshave suggest this happened to Intel during the CuMine ramp, although only on a small scale. I believe this is the cause of the poor output of AMD's Fab today.

As for heating up a transistor, it was just a phrase the author used. The transistor heats itself up. It doesn't need any help and temp slows down transistor switching. It's a bad thing.

EP


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