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07/18/07 3:06 PM

#45792 RE: wbmw #45790

Anyway, I thought people would find this interesting.

Nice spot. Looks like processing variation is not well
controlled in AMD's 65 nm process. Sucks to be AMD
when it tries to ramp its naive quad cores with far more
logic transistor on-die. Pity it can't match up low and
high leakage devices in MCMs to reduce TDP variation
at the socket level. Oh well...

BTW, another datasheet thing to be very wary of is the
junction temperature the vendor specs idle and sleep
power state current consumption. If it is unrealistically
low then they are misrepresenting power consumption
in some kinds of systems and/or under certain kinds
of operating conditions (e.g. regularly slipping in and
out of idle state based on the OS tick timer etc).

Remember, leakage current approximately doubles for
every 10 deg C rise in temp.

P.S. (to Chipguy) I posted your other response on SI.

Thanks. I noticed you had no trouble identifying the
idiot in question. ;-)


07/18/07 4:23 PM

#45805 RE: wbmw #45790

Very interesting indeed. Do the AMD parts actually ever go into that ultra-low-power state or do they just have the state for say, standby?


07/24/07 8:30 PM

#46088 RE: wbmw #45790

Sorry wmbw but you have not understand this datasheet and the data in there correctly.

Please see page 13 table 7. ADA parts are standard. ADO parts are parts for 65 Watt. In 90 nm case (stepping F2/F3) this means that ADO parts are low power selected parts.

Therefore the posted comparison is incorrect. Correct comparison is:

90 nm standard parts:
ADA5000IAA5CZ (therefore ADA instead ADO)
24.8 A @1.35V, 5.7A @ 1.1V, TDP 89Watt

65 nm standard parts:
16.6A @ 1.35V, 4.4A @ 1.1V, TDP 65Watt

Intel E6700 65 nm (2,66 GHz)
20 Watt @ HALT, TDP 65Watt
Intel E6720 65 nm (2,66 GHz)
8 Watt @ HALT, TDP 65Watt
(note Intel Tc=50°C, AMD Tc=72°C, numbers should not be compared)

So the 65 nm parts are better in overall power envelope (TDP) and have a significant lower leakage.

However if you compare 90 nm special TDP selected parts to 65 nm standard (unselected) parts you come to such a completly wrong conclusion.

Generally such a comparison is a bit dangerous because maximum ratings are compared (see note 6: max Tcase and 90 nm standard parts: 70°C, 65 nm standard parts: 72°C) and not typical ones).

Halt state does not mean that processor is completly halted and that all power draw comes from leakage. This is not true, because the clock is still switching, caches are updated, memory interface is working, interrupts controlled, etc. Only the pipeline stops execution (gated).

Therefore the lower numbers of higher speed grades show only that the chips are of course selected into speed bins (as every manufactorer does) but nothing else and especially not the leakage.

In addition your conclusion is wrong. No matter if you take your wrong numbers of the 90 nm selected parts or the correct ones of the standard parts. Both show that the overall power dissipation of the 65 nm parts grows far less with clock frequency. Therefore also your conclusion is wrong, because this indicates a very good potential to reach much higher clock rates as for the 90 nm parts. And your basic conclusion that halt power draw correlates with leakage current draw is also wrong.

So even if static leakage of 65 nm parts is a bit more than of the 90 nm selected parts, the dynamic power draw is less and thus allowing higher clock speeds at same TDP envelope.

Even more as you see on page 12 table 1, the 65 nm parts have a new revision (G1) which indicates a mask revision. With that different clock gating / etc. could have been established in this revision making it impossible to compare power draw in anything but with full load (to get indications on process).

As you see with the Intel numbers you can see how much a mask revision has impact on these numbers: Intel increased clock gating on the E6x20 series and thus lowered halt current draw by factor 2.5 on the same process. So what you would conclude from that? Same process at Intel! No of course just a mask revision, as the mask revision of AMD. Therefor the better numbers of 65 nm revision G1 compared to 90 nm revision F3 could also be a result of mask revision.

In addition if you read power draw tests of AMD Athlon X2 CPUs you see that 65 nm have lower power draw than 90 nm under all conditions. The 65 nm standard parts can even compete with the SFF ultra low power parts.

The reason why AMD delivers always the lower speed grades with their latest process is also quite simple: manufactoring costs. Die size of 65 nm parts is lower and therefore production cost is lower (in addition the 65 nm fab uses 300 mm wafer compared to 90 nm/200 mm Fab30). So they use them for the less expensive lower speed grades. The 90 nm parts are used for the higher speed grades, because their higher prices can pay for the higher production costs at 90 nm. This happend exactly the same with the transition from 130 nm (higher speed grades & FX parts) to 90 nm (lower speed grades).

So everything is fine on their process.

And regarding IBM, just look on their 4,7 GHz power 6 so process is really a no brainer. Only thing you have to do with process is to increase yields and AMD already announced that their yields are fine on Fab36 (all wafer starts are 65 nm there). The real problem was, that AMD is always a bit late in establishing processes because SOI/SiGe support takes longer than Intels plain Si-Process (and maybe can make less investments in fabs than Intel). However the SOI process has of course more potential than the plain one.

Also SOI reduces leakage, because leakage through die is removed because of silicon on isolator (SOI) isolating such leakage (exactly what the name SOI stands for)!

Regarding low initial announced clock rates of Barcelona CPUs: AMD has SpeedPath issues. That means they need some mask revision to increase clock speed (with removed speed pathes) but no changes on process.