Lightwave Logic Inc (LWLG)

[adagium]

Unique SWIFT® features include Polymer dielectrics:

>Polymer dielectrics
>Multi-die and large die capability
>Large body package capability
>Interconnect density down to 2/2 µm
>Cu pillar die interconnect down to 30 µm pitch
>3D/Package-on-Package capability utilizing Through Mold Via (TMV®) or tall Cu pillars
>Meets JEDEC MSL2a and MSL3 CLR and BLR requirements

Enabling Technologies For SWIFT® Packaging:

Key assembly technologies enable the creation of these distinctive SWIFT® features. Using stepper photo imaging equipment, 2/2 µm line/space features can be achieved, enabling very high-density die-to-die connections required for SoC partitioning and networking applications where 2.5D TSV would typically be used. Fine-pitch die micro bumps provide a high-density interconnect for advanced products, such as application processors and baseband devices. In addition, tall Cu pillars enable a high-density vertical interface for mounting advanced memory devices on the top of the SWIFT® structure.

https://amkor.com/technology/swift/


Fan-out wafer-level packaging:

https://en.m.wikipedia.org/wiki/Fan-out_wafer-level_packaging


Amkor and GlobalFoundries Cut Ribbon on Strategic Cooperation in Portugal

Partnership to strengthen European automotive supply chain and expand services for global customers

TEMPE, Ariz. -- January 16, 2024 -- Amkor Technology, Inc. (Nasdaq: AMKR), a leading provider of semiconductor packaging and test services, and GlobalFoundries (GF), one of the world’s leading semiconductor manufacturers, will officially kick off their strategic partnership in Europe with a ribbon cutting ceremony at Amkor’s Porto, Portugal facility on January 16, 2024.
Since February 2023, GF has transferred 50 tools from its Dresden site to Amkor in Porto, with first customer products being qualified on the newly installed GF tools.

Etc etc

About Amkor Technology, Inc.

Amkor Technology, Inc. is the world's largest US headquartered OSAT (outsourced semiconductor assembly and test) service provider.

https://c44f5d406df450f4a66b-1b94a87d576253d9446df0a9ca62e142.ssl.cf2.rackcdn.com/2024/01/Amkor_GF-Portugal_Press_Release-EN.pdf


Lightwave Logic Announces Issuance of U.S. Patent for Breakthrough Chip-Scale Packaging Technique to Enable Foundry-Level Packaging of Polymer Modulators

ENGLEWOOD, Colo., Dec. 12, 2022 /PRNewswire/ -- Lightwave Logic, Inc. (NASDAQ: LWLG), a technology platform company leveraging its proprietary electro-optic polymers to transmit data at higher speeds with less power, today announced the issuance of a U.S. patent, the application of which was announced in June 2022, on a new invention that will enable simplified foundry-level packaging of polymer modulators using chip-scale techniques which can be applied at wafer level, critical for high-volume manufacturing applications.

This patent issuance – entitled "Hybrid electro-optic polymer modulator with atomic layer deposition (ALD) sealant layer" with patent number US 11,506,918 B2 – allows Lightwave Logic's proprietary polymers to be sealed to moisture and atmospheric gases in a very low temperature and quasi-hermetic environment through the use of a chip-scale packaging approach that can be applied in parallel at wafer level (i.e. in volume) and that eliminates the need for a separate hermetic enclosure or "gold box." Chip-scale packaging is a technique that has been gathering momentum in the silicon electronics industry for the past decade to reduce device chip packaging costs and increase device performance – enabling high-volume front and back-end manufacturing as well as extremely small sizes in miniaturization.

Over the past two years, Lightwave Logic has developed its atomic layer deposition techniques to not only seal its polymers in a quasi-hermetic environment, but to improve both the stability and reliability of polymer devices, without any adverse effects to poling. The sealant process will enable lower cost system implementation in a high-volume foundry environment. Specifically, Lightwave Logic's electro-optic polymer modulators will be sealed with low-temperature conformal atomic layer deposition dielectric layers that are supported on a silicon substrate with passive silicon photonics waveguides.

Etc etc

https://www.prnewswire.com/news-releases/lightwave-logic-announces-issuance-of-us-patent-for-breakthrough-chip-scale-packaging-technique-to-enable-foundry-level-packaging-of-polymer-modulators-301699831.html