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It is a great argument for anything that obeys Ohm's law. For all practical purposes, semiconductors do.
But anything that obeys Ohm's law draws a constant current if a constant voltage is applied to it.
To a very high tolerance, modern uPs have a constant voltage applied to them.
Do you think the current drawn by a microprocessor is constant?
No. That's rather silly. Did you get that implication from my statements? If so, then you clearly
misunderstood. I don't recall ever saying that.
So you think uPs processor draw a time varying amount of current *YET* you also think they
obey Ohm's law.
You really don't know what the hell you are talking about.
I'll be generous and give you a clue. Things that obey Ohm's law don't need decoupling capacitors
to compensate for impedance in their power supply.
Chipguy, I think Spokeshave is talking about absolute max power, not average power.
Thermal time constants of an IC are on the order of ms. It acts like a low pass filter. In
terms of thermal design issues peak power that is drawn for only a fraction of a thermal
time constant is averaged out to a lower effective maximum value. Icc_max is spec'd
for the benefit of power supply designers. Time constants of power supplies is on the
order of us. That means the current peaks that are of interest to power supply designers
are averaged down in value as far as thermal issues go. Think of this issue like fractals.
How long is a rugged coastline? It depends on the length of your measuring stick.
In fact, I'm here to tell you that I don't see a single consumer-/small-business-level binary
architecture that will have a longer longevity than AMD64.
I have yet to see an ISA execute a single instruction. Microprocessors execute instructions.
And microprocessors are ICs that are expensive to design and ever increasingly expensive
to fabricate. If AMD doesn't get much healthier soon AMD64 might be history in far less than
a decade. Or at least that which executes AMD64 instructions. The ISA manuals may live on
indefinitely. Like the PDP-11 and Transputer manuals on my bookshelf.
Now you know why the Linux leaders are so enamoured of it. A capable achitecture for the next decade.
Who are these leaders? IBM? It is grooming Linux for its high margin iron like z series and
POWER. Sun? It builds Xeon boxes to run Linux. HP or SGI? They are going IPF. Dell? We
just got their answer to the 64 bit question. Or do you mean the rank and file buyers and
users that go to Linux trade shows? Here's what they think:
http://www.sgi.com/newsroom/press_releases/2003/january/best_of_show.html
There is nothing in the Opteron Tech Doc about "common software". That's bogus. You guys
would rip someone apart if they used a definition from the doc of a completely unrelated part it if had
anything to do with Intel.
You raise an interesting point. AMD was disingenuous in spec'ing a maximum power for
Athlon but at least the naughty details were in the fine print. But with Opteron you can drive
a truck through the gaps in the power specs. There isn't even separate max power values
for the 1.4, 1.6, and 1.8 GHz parts. Why is AMD being so evasive about Opteron power?
Multiply Vcc_max (1.420) by Icc_max (67.4). Clearly, fact checking is not one of *your* strong points.
That's a great argument. If the P4 was a resistor.
Do you think the current drawn by a microprocessor is constant? By definition if a value
isn't constant then its average value is less than its peak.
>> Amazing what you can do when the entire benchmark
>> fits in on-die cache!
>
> Nice theory but the only company that can come close
> to that is IBM with 128 MB L3 in POWER4(+) systems.
Surely that's not on-die?
The L3 data is stored off-chip but the L3 tags and control logic are on the
processor. I didn't mean to imply that the 128 MB was on-die cache, but
rather the 128 MB shared cache capacity was almost sufficient to swallow
up SPEC CPU 2k.
I stand by what I said earlier, the new entries to the top500 list this year will be
Opterons and Itaniums. Why bother with anything else?
The biggest loser will be Sun. Their US-III family of processors is pathetic compared
to I2, POWER, and Opteron. I'd be surprised if they have any systems left on the
list next year. IMO Sun has to abandon SPARC sooner rather than later or their
rate of decline will dramatically increase until someone acquires them for Solaris.
The interesting question becomes which way will they jump? IPF or AMD64? Stay
tuned...
2. The numbers in this column reflect Intel's recommended design point and are not indicative
of the maximum power the processor can dissipate under worst case conditions.
Worst case conditions which causes throttling which in turn reduces thermal power. The important
point is that 82 W is the level the OEM designs for and which in turn determines system cost. The
level which allows the processor to operate at full speed under all but the most pathological instruction
sequences and deep corner cases of Vdd level and pin loading.
I think Dan3 is correct in this case about max power being over 100W for the latest Pentium 4.
Any documentation that states >100 W? I am inclined to think the number came from Dan3's...
err, usual source.
Usually, it's not a number that thermal designers need to worry about, but when comparing against the
Athlon 64 max power, you should probably do a direct comparison.
Come on, AMD plays games with power. The "Total thermal Power" for Opteron is spec'd as
Idd_max * Vdd_typ. Who in their right mind spec's Pmax with Vdd_typ?
Idd_max isn't described in the Opteron DS but in Athlon documentation it is described as the
maximum draw observed with common software, not the structural maximum. That makes it
no more of an absolute than Intel's TDP spec. Even MDR reamed out AMD about this a year
or two ago.
Their commitment to Itanium has made SGI (once a high flyer), a penny stock.
Perhaps you should take off your ideological blinkers.
SGI was self-injured by an ill conceived acquisition of Cray and subsequent incompetent
disposal of its assets and divesture. But mostly by an attempt to sell expensive x86
workstations built with proprietary chipset and graphics technology against far cheaper
standard high volume x86 systems that performed almost as well and occasionally even
better.
You missed the most important advantage of Athlon-64. It provides a 64-bit binary architecture that
should be stable for a decade or more.
ROFLMAO!
From a company that has lost money, what, the last eight quarters straight and whose debt is junk
status? I am sure those who have watched the trials and tribulations of Alpha users as their platform
got passed from DEC to Compaq to HP like a hot potato before finally being killed like a racehorse
for the insurance money will think long and hard before betting their company on Opteron based
computing. Fool me once, fool me twice. A lot of Opteron gear may eventually be sold but it will be
for non-business critical, high platform turnover uses where going flavor of the month to save a
buck is ok.
I guess these "commitments" to Itanium were not cheap.
I guess they were willing to pay the price to move to a uP family with significantly
higher FP performance and scalability than either their own MIPS family or the
alternative 64 bit merchant processor from AMD. They needed a stand-out product,
not a 3rd tier OEM's me-too-er, to survive and it looks like they got it, courtesy of Intel.
Amazing what you can do when the entire benchmark fits in on-die cache!
Nice theory but the only company that can come close to that is IBM with 128 MB
L3 in POWER4(+) systems.
http://www.specbench.org/cpu2000/analysis/memory/
SPEC CPU 2K was engineered to run on systems with a minium of 256 MB of
memory and blow past the 4 to 8 MB external caches common to high end RISC
systems of the late 1990s. Many component programs use 180-190 MB. Half the
programs use over 100 MB of memory when running. BTW, the next version of
SPEC CPU will likely increase memory usage by up to 4 or maybe even 8 fold.
Re: The Athlon 64 processors coming out this year will have 1.50V Vcore and up to 89W Maximum
Thermal Power
Curious that you didn't post the obvious comparison that Intel's current P4 is now over
100 watts - an oversight?
The maximum thermal power of the P4/3.2 is 82.0 Watts.The data sheet has been
available since Monday. Not that fact checking is one of your strong points.
Why aren't they announcing when it will be ready right now?
Because they don't know how long it will take to get it to work.
That was *so* lame. The scraping sounds I hear must mean the bottom
of the barrel of bitter retorts has been reached. :-P
Ever thought the announcement of availability and pricing may have to
wait for the announcement and disclosure of pricing for the processor
that goes into it?
So I'm sure we'll have Dan in here telling us how AMD's process technology is vastly
superior to Intel's and how Intel will be playing catch up.
To paraphrase Mark Twain's comment about Wagner's operas, AMD's process is much
better than it yields or clocks. ;^)
I still think of the AMD common to be rather on a launchsite than on a runway.
I'll agree with your analogy with the caveat that it is very early in the space program.
AMD shares are as likely to blow up in your face as to rise an appreciable amount.
Does anyone have a link to the tech specs of G5, including its pipeline length?
Poke around the IBM Micro web site. I think you can find a PDF of the uPF presentation
on the 970 from last October.
By the way, the P4 pipeline is indeed 20 stages, but that's only counting from the
instruction trace cache to retirement
That's the branch mispredict pipeline. That is the most critical one in any modern
processor the one usually referred to when discussing the length of its basic
execution pipeline.
The reason why it is much slower than ~3 GHz is that unlike the full custom P4, IBM's
POWER4 family, including the 970, were designed using an ASIC like, highly synthesis
based design flow.
You sure about this? Even AMD doesn't do this.
Yes. This is described in ISSCC 2001 paper 15.2. Over half the non-SRAM macros
in the POWER4 were synthesized. In an Alpha processor, like the similarly complex
EV6, that fraction is exactly zero. The POWER4 likely took a lot less effort and
time to design and debug than EV6. OTOH it needs twice as long a pipeline and
SOI processing to get roughly same clock rate as EV6 at the same feature size.
The SOI processing raises costs, lowers yields, and the longer pipeline drops
performance, especially on integer code.
Also, the pipeline for this CPU is quite a bit longer than the Athlon (15 stages, or so), and
manufactured on IBM's advanced manufacturing process.
A 15 stage RISC processor is arguably almost as finely pipelined as a 20 stage x86 uP
like the Pentium 4. GIven a modest performance bonus from SOI one might reasonably
expect the 970 to clock at 3.0 GHz or more despite it being a somewhat "wider" design.
The reason why it is much slower than ~3 GHz is that unlike the full custom P4, IBM's
POWER4 family, including the 970, were designed using an ASIC like, highly synthesis
based design flow. The benefit of this approach is reduced design time, and theoretically,
reduced time to market. The curious thing is the Northwood P4 beat the 130 nm POWER4+
to market by about a year and the 970 by more than 18 months.
Exactly. eom
This SARS thing has become the dog-ate-my-lunch excuse, and that applies to Advanced Micro
Devices,' said Paul Martin of Martin Capital Advisors LLP, which manages $25 million
and is deciding whether to sell its few remaining Advanced Micro shares. ``They're just not
managing their business as well as Intel.'
I hope he manages funds better than he manages metaphors.
Thanks Tenchu. eom.
LOL, I swear I didn't. Some will doubt me given NiceGuy's wildly unpredictable
nature, but I really didn't. :-P
I've just got to go over to SI and see how NiceGuy is taking the news...
That's a hard one to predict.
"It's a great buying opportunity. AMD is sucking in Intel to complacency with strategically
withheld speed increases to Opteron and various planted leaks like the crappy HP A64
system specs. When the truth is revealed as a flood of stockpiled 2.4 and 2.6 GHz A64
Dells hit the market in August the stock will go straight to the moon!"
Advanced Micro Devices Inc. (AMD) Tuesday lowered its second-quarter sales outlook, citing declines in personal-computer and handset sales in Asian markets, primarily related to the SARS epidemic.
SARS? Mot used that excuse for their most recent results too. Hector must have picked up the idea
while lunching with his old buddies. IIRC I predicted on ihub that AMD would also latch onto SARS
as the excuse du jour (inventory reduction was wearing thin) but I can't find the post.
SGI is poised to ship Altix 3000 systems with supported supercluster
configurations of 4 to 128 Intel Itanium 2 processors as soon as the new
processors are commercially available.
That's what, next week? Good, SGI is a company needing a hot product
right now and it looks like they got it.
For customers demanding even larger Altix superclusters, SGI will be
supporting configurations of 256 processors in August 2003 and 512
processors in October 2003.
LOL, anyone care to make predictions about the composition of next year's
TOP 500 supercomputer list?
chipguy, single processor in a 2P or 4P system would be in no way representative of the
performance of a uniprocessor system.
True. In the Alpha world, the 4P systems had the best single thread benchmark performance
for EV6x systems because they used the full memory system configuration of the Tsunami
chipset. OTOH, Opteron single thread performance likely goes down a bit from 1P to 2P to 4P
because of its inefficient broadcast based coherency scheme.
Nevertheless single thread performance is still an important parameter for any general purpose
computer system regardless of whether it has 1 CPU, 4 CPUs, or 64 CPUs. That is why AMD
has already submitted 8 separate official SPEC CPU scores for 4 way Opteron systems. Or
perhaps you think you know better and AMD is mistaken?
Besides, you are comparing 90nm and 130nm CPUs which will co-exist in very low volume for a limited time.
You mean like how Northwood co-existed in "very low volume for a limited time" with 180 nm Athlons?
Given that the G4 ("Supercomputer on a chip") ran at a top speed of 1.4 GHz, the
G5 is a giant leap for Apple-kind.
True. But for an ankle biting dog a giant leap is reaching your calves. Quite annoying
but you still aren't worried about protecting your throat unless you trip and can't get up
again.
By the way, Apple is calling the G5 "The World's First 64-bit Desktop Processor."
Only if you forget about those other 64 bit desktop processors like the MIPS R4000PC
(10 years ago) and the Alpha 21164PC (7 years ago). But Apple often counts on its
customers being "born yesterday". ;^)
Like AMD, Apple is going to milk the 64-bit marketing bullet to its fullest. Unlike AMD,
Apple might actually do a good job at it.
Apple is pretty skilled at getting the fern bar crowd hot and bothered but the price tag
will turn off the huddled masses that buy 97% of computers no matter how techporn-ish
the 64 bit come ons become.
This puts P4 a full 11.5% ahead of the fastest Opteron. It's even faster than the 2.0GHz Opteron
which is not released. This is about the widest gap I can remember ever seeing.
PC riff-raff on your knees!
You do not even deserve to behold the wonder that his Steve-ness will unlease
in August on an unsuspecting world. Cower worms while you gasp at the earth
shaking raw power of the mighty 2 GHz G5:
http://www.aceshardware.com/forum?read=100022380
"Apple has posted on their site some spec scores (!!!) for the 2.0 GHz 970
fp_rate_base 15.7 (2 CPU)
int_rate_base 17.2 (2 CPU)
fp_base 840
int_base 800
They posted some tech docs too, here we go: http://www.apple.com/g5/ "
All this power in the hands of mere mortals for the low, low, price of $3k. You
are not worthy!
Now the typical heat dissipation of the Pentium 4 3.2GHz processor equals 85W, and the maximum heat dissipation exceeds 100W.
A comforting thought for Alaskans during winter months.
I wonder why the Northwood data sheet I down loaded today said the P4/3.2 has
a TDP of 82.0 W (compared to 81.9 W for the P4/3.0; Tc[max] stayed the same).
Somebody better go tell Intel to fix their data sheet.
I expect Madison to be the absolute performance leader with 1 & 2-way systems, but I also
expect there will be a crossover point - maybe at 4-way - with Opteron because of better scaling
of the aHT fabric.
ROFL. The fastest 4P Opteron can't even best 4P McKinley in HPC, let alone Madison.
For supercomputers, I expect that Opteron will quickly become the processor of choice. 4-way
motherboards connected with a switched backplane makes this a very attractive offering.
No, this is an attractive offering:
http://www.sgi.com/servers/altix/
BTW, this beast has 95% scaling from 32P to 64P. Now. How welll do you think "aHT fabric"
scales at 64P?
Are you claiming that no one is interested in single thread performance of a processor
in a 2P or 4P system? Or that uniprocessor Opteron systems will never be built? I have
seen some lame rationalizations on this board before but this is a potential hall of famer.
Ummm, yes that was the intended inference. And yes it often
seems appropriate.
Make sure that you give us a full report out on your Eqyptian Riverboat trip...... Down De-Nial.
Yes, I want to hear all about the tangerine trees and marmalade skies. And the rocking
horse people eating marshmellow pies.
So, while Intel reports the latency for accessing the first sector of a line of cache as 7 cycles, the entire
cacheline takes two accesses, and each is the result of an L1 "miss". Add it all up, and you get the
aggregate 18 cycles of latency that Cachemem reports.
The P4 L1 dcache has a 64 byte line size, the size of an L2 sector. An L1 miss is satisfied and
CPU execution proceeds when the critical sector is fetched from the L2. Measuring L2 latency
with two L1 misses makes no sense because there are two separate and independent accesses
made to the L2 to satisfy them.
Since this "true" aggregate latency is also
applicable to 256K cache, that explains why there is no noticable difference between Willy and
Northwood cache performance.
In access latency measured in cycles. In absolute time latency it is substantially faster. It is also
twice as large which reduces miss rate by an average of 30%, a significant factor for the "cache
performance" of desktop processor with 64B/128B cache lines.
BTW, didn't you previously claim the Northwood's L2 latency in cycles was twice that of Willamette
and that was due to its larger capacity? Do you believe doubling the size of an SRAM or DRAM
doubles its access time?
Nevertheless, Intel is catching up to AMD's 32-bit chip, but AMD has started shipping 64-bit chips that are
supported by existing software, putting AMD farther ahead of Intel than ever.
Sure. Opteron's 1095/1122 SPECintbase2000/SPECfpbase2000 is PUTTING AMD
FARTHER AHEAD of P4/3200's 1221/1252 than ever.
By those metrics Athlon gives much more power to the people.
Right on brother, stick it to the maaan!
Too bad the *man* AMD sticks it to most often are those greedy capitalists who
invest long in its stock.
But EV7 includes all those Rambus controllers and the 4 interprocessor links.
That was a design choice of what to integrate. The trade-off was they could only
fit 1.75 MB of relatively slow L2 cache on board and it cost them in single thread
performance. The EV7 is actually slower on SPECint2k than the older EV68 which
is less than a third of its size.
Unless you think that Intel competes in some sort of "Special Olympics" for CPUs then limiting
its competition to .18 aluminum chips is absurd.
Only to the clueless. Look at the competition when McKinley came out last year. It was all 180 nm
chips.
Itanium has to cut it in the real world, where the competition is already shipping .13 on SOI as
Opterons and IBM Power 4.
You don't keep up with current events do you? IPF will be officially shipping in 130 nm in less than
two weeks. IIRC that is about 6 months behind POWER4+, a few months behind US-III and Opteron,
about 3 months ahead of PA-8800, and about 6 months ahead of EV79.
Intel does have to charge more, per chip, to make up for those extra FAB costs, or else that money's gone for good. If they sell 150 million Itaniums in the next 2 years, those FAB costs only add $10 per chip
You forget that those 130 nm fabs were paid for by the sales of 180 nm x86 chips. As Madison
ramps in volume (and grows in size next year) it will be largely taking up 130 nm capacity that is
left over as x86 processor manufacturing starts to transition to 90 nm. For all we know the fab
costs of IPF uPs might consist entirely of labor and raw materials.
Why do you believe in IBM's manufacturing capabilities? When in their history have the they ever proven that they can fabricate millions of complex chips per year with high, stable yields?
I agree with your basic point that IBM has little to teach AMD about high volume, low cost uP
processing. But I think you are being unfairly harsh on IBM Micro.
IBM used to manufacture huge quantities of DRAM for its internal consumption. At another
time they manufactured the industries best high performance video RAMDACs and sales
of these device was likely in the millions. Today they are manufacturing 4xx series PowerPCs
and PowerPC SOC devices for the embedded control market in quantities that are likely well
into the millions per year.
I don't have first hand experience with IBM Micro as a foundry but from what I hear they are
a relatively stable and reliable manufacturer with yields well under control. When TSMC was
having its teething troubles at 130 nm more than a few fed up fabless semicos turned to
IBM Micro despite its higher costs.
BTW, the split supply of PowerPC processors to Apple isn't due to IBM capacity issues. That
arrangement is at Apple's behest. It is called multiple sourcing and it used to be standard
practice in the industry (how do you think AMD got into the x86 business? . It allows Apple
to play IBM and Mot off against each other to keep its cost low.