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drjohn

02/26/03 9:14 PM

#4221 RE: spokeshave #4220

RE:Intel is having trouble binning the 3.06, I am not sure of that I think 3.06 has always been a different creature its the
only one with hyperthreading turned on I see it as a precursor
of the D1 stepping it must be bining decent Intel went out of
their way to say margins where up slightly because of the high
price of the 3.06, releasing a 3.2 at 1.55 at .13 micron is nothing to be ashamed off.
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Elmer Phud

02/26/03 10:47 PM

#4223 RE: spokeshave #4220

Spokeshave, it would help if you provided a link.

I realize you misread the date, but this stepping release is normal. For your information, Intel has a number of steppings in the works as we type. I know of 4 in production right now and as many in varying stages of qualification. All address different issues but improved binsplit is usually common to all of them. Some are simply a metal routing change to improve speed. Those don't require notification to customers because there's no logic or specification change. Others may be to accomodate a different package. Some are a full mask layer change to take advantage of process improvements and some may be only to improve ESD protection. Some may fix errata. Still others may be for reasons that might be discussed at a later date.

EP