Re: Xeon, requires a bridge chip between FSBs after 4 way. That isn't glueless
But Opteron needs a bridge chip after 8-socket, so what difference does that make? I think Tenchu is arguing more on the basis that even Opteron needs additional chipset logic before you can make a platform. You can't just string the CPUs together "gluelessly" and expect it to make a computer. You can't even be miserly over the number of companion chips, or else you end up with something that's under powered in I/O.
By the way, the strength in Opteron doesn't come from talking directly to other Opterons, it comes from offering the best trade off between system bandwidth and average system latency to main memory. The data in an Opteron system only passes through the CPUs before reaching its destination in memory, so I consider that the more important metric. Besides, even Xeons on the same bus share signals that "talk" between CPUs, but it's how they interact with memory that makes all the difference. Unfortunately, all the Xeons on the same bus have to share the same path to main memory, which presents a bottleneck, while Opteron does the right thing by offering multiple pathways to local and remote memory. Intel will eventually have to offer something similar to stay in the game.
News 
Market Data 
Discover 
