Replies to post #55884 on Advanced Micro Devices Inc (AMD)

[pgerassi]

Dear Tenchu:

Sorry the first link states 8 way Xeon II, yet in all the literature, Xeon, requires a bridge chip between FSBs after 4 way. That isn't glueless. The second link says that a 9,000 CPU system is "glueless", yet those also require ASICs to connect them else its a cluster and those require glue in the form of Ethernet NICs, hubs and/or switches. That author is particularly clueless.

As to the third link, it states specifically that "can effectively scale to 8-way and larger configurations with specialized chipset and clustering technologies". And needing a NB to communicate between CPUs (even on the FSB as one CPU can NOT talk to another directly) does constitute "glue". Serverworks chipset uses the NB to switch between FSBs to get to 8 way. Opterons do not need to have any chip between them or on an HTT link to talk to each other. Think of the answer this way, can two xeons without a NB talk to each other? They can snoop on the NB talking to another CPU, but CPU1 can't do a transfer of data directly to CPU2. It goes first from CPU1 to the NB to memory and then from memory to the NB to CPU2. Some NB implementations may cut out the memory steps, but still need the NB.

The last is just another rehash of the Intel P/R documents.

Now the FSB can be made glueless like the PCI bus masters, but the NB is the only bus master on Intel's FSBs. It has the critical circuitry needed to make the FSB work. Ignoring its need when considering something to be "glueless" is, at best, misleading. Opterons need no other chips to communicate amongst themselves. They do need external glue beyond 16 way (with dual core) currently.

That could change in the future if they add cHT links to each package (4 cHT links = 32 way, 5 cHT = 64 way and 6 cHT = 128 way assuming dual core). They could also add some cache coherency accelerator (with OS help, to make even more efficient) to Opterons to reduce cache coherency's impact on cHT traffic in high way SMP setups. But currently, up to 8 socket SMP, Opterons do not require any "glue".

Pete

[fastpathguru]

Uhh, Opteron's architecture looks watered down compared to the original POWER4 interconnect- and memory-architecture. Never said AMD invented on-board switch fabric or multiple p2p links enabling mesh interconnect...

They just brought it mainstream.

fpg