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wbmw

12/01/02 5:40 PM

#2883 RE: spokeshave #2881

Spokeshave, Re: I find it hard to believe that among all of the self-proclaimed industry experts on this board, nobody knows anything about strained silicon. Lack of knowledge sure has not kept anyone from speculating about AMD's possible problems with SOI. In the transition to 90nm, Intel will be incorporating strained silicon and low-k. All of this will be happening at a time when the 130nm process is completely topped out, Hammer will (ostensibly) be in production, and there will be great pressure to get the 90nm process going. Personally, I think that it will be a very difficult transition and will present a significant risk for Intel's position in the CPU market. I was curious about what others felt.

Due to 20/20 hindsight, I can easily speculate that SOI has been the root of all of AMD's problems with Hammer. I may be wrong, or I may be right, but that's how the facts appear to me. In terms of strained silicon, Intel is definitely taking a risk, but unfortunately, my foresight isn't so clear. <g>

My guess is that the 90nm process node will be a challenge for all, but in the case of Intel, I would guess that they've had more resources put towards the development of this technology (ever since mid-2001), while AMD has spent more time getting the bugs out of their .13u processes (both bulk si and SOI). With a year of head start, Intel may have an advantage going into 90nm production, even with the risk of strained silicon.

Re: much of the conversation is given to denigrating AMD rather than discussing Intel. What's it to you if I choose to point this out?

Nothing. Just as I have chosen to ignore the AMD bashing from others, I will ignore complaints of that bashing from you.

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alan81

12/01/02 7:14 PM

#2885 RE: spokeshave #2881

Opinion on Intel 90nm process health
In the transition to 90nm, Intel will be incorporating strained silicon and low-k. All of this will be happening at a time when the 130nm process is completely topped out, Hammer will (ostensibly) be in production, and there will be great pressure to get the 90nm process going. Personally, I think that it will be a very difficult transition and will present a significant risk for Intel's position in the CPU market. I was curious about what others felt.
I am sure there is already great pressure, and probably has been for the past year. Note that Intel reported fully functional SRAM in Mar. 2002 as reported here:
http://www.intel.com/pressroom/archive/releases/20020312tech.htm
Details on where they were at in march:
http://www.intel.com/research/silicon/90nmSRAMpressbriefing0302.pdf
(fully functional SRAM, 7 layer metal, 330M functional transistors on one die, 300mm wafers, 193nm stepper, 1u^2 SRAM cell size)
Details on progress through August:
http://www.intel.com/research/silicon/90nm_press_briefing-technical.pdf
(1.2nm gate oxide, strained silicon, 50nm gate length, 2% added cost for strained silicon, +10% to 20% improvement for strained silicon, Carbon doped oxide for interlayer -low k, 75% tool reuse in moving to 90nm from 130nm)
And finally in Sept. 2002
http://www.intel.com/research/silicon/Bohr_IDF_0902.pdf
(Communication version of the process, then mostly the same stuff as the August presentation)

Note that since they had fully functional full loop silicon in Mar. 2002, they must have started this run in late 2001. I would expect that they started short loop runs over a year before this date. This also means they have been past the "functional units" stage and into yield improvement for the past 9 months or so. They have another 3 months or so before I expect them to start production runs. If there are any delays, I expect the Prescott design could be as much a culprit as the process.

In terms of the 130nm process being topped out, the roadmaps I have seen indicate they will release something close to a 3.46Ghz Northwood by midyear 2003, which leads nicely into the H2 2003 Prescott release. I believe it is likely Intel will ship more 90nm processors in Q4 of 2003 than AMD ships processors.
--Alan
P.S. I have been a regular poster over at the Motley fool site, but noticed some fairly interesting discussion going on here so decided to chime in. In terms of my background, I worked for Intel for about 20 years (my bias usually shows). I cashed in my stock and retired in mid 2000. I was mostly involved in Flash memory, and the integration of the design with the process development team.


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Elmer Phud

12/01/02 8:01 PM

#2892 RE: spokeshave #2881

Spokeshave -

I find it hard to believe that among all of the self-proclaimed industry experts on this board, nobody knows anything about strained silicon.

It is kind of surprising. What happened to Yousef?

Personally, I see it as Intel being able to do it so they do. That's much different from AMD who HAS to do SOI. What makes you think SS is comparable high risk? When Intel says they are going to transition to a new process technology I just accept that they will do it. When AMD says they are doing something very high risk I say I'll believe it when I see it.

I think you're exaggerating the risk of strained silicon.

EP