Chip, just get it over with. Current CMOS fabrication techniques will not be viable in upcoming generations of processors. You know very well some current CPUs are still primarily manufactured using aluminum metal layers within the CMOS gate array. These aluminum layers have proven to be ineffective above 1.1GHz. Do you recall Intel's recall of all Pentium III 1.13GHz chips? If this is is not an indicating factor to you, than just forget it.
Then, the Pentium III core yield rate above 933MHz has been rather poor. Do you agree? The effects are not limited to Intel. AMD's higher-clocked Athlon Thunderbirds are now being manufactured using a copper interconnect process. Copper is a better solution with less resistance and better conductivity than aluminum. But the switch to Cu interconnect, higher k for the gate oxide, and lower k dielectrics between the interconnects will only solve the problem for a little while longer.
Nowadays, most manufacturers agree that CMOS technology will not be able to scale efficiently (some still say below 0.1 micron, but I'll give you the the 0.07 micron critical feature size limitation. You know very well current CPUs, such as the Pentium III, are still manufactured with a .18-micron process. hy do you think the switch to below 0.1 micron didn't take place (as the 2000 roadmap called for)? The need for smaller die sizes is clearly evident as core clock speeds increase. CMOS technology could be outdated quickly with the theoretical practical limit of say .07 micron. A new process will be needed to replace this aging standard. Why do you think everybody, including Intel is considering other options, including the introduction of the Silicon-on-Insulator (SOI) fabrication process? All these alternative processes, however, are only intermediate to the real solution.
You like it or not, integrated optics will be the final, long overdue answer. In case you didn't know, historically, integrated optics (for obvious reasons) were the first choice anyway, and not integrated electronics. The rapid advacement of IC's kept them down for a while, but their (IO's) time has come. After Intel's announcement you'll see all the other chip companies, one by one, reconsider their view of Si as it come to its use to IO's. And you'll see quite a fierce competition among them, that will accelerate the development.
I'm not trying to sound like a "prophet" (as you like to call me). Just trying to asess the best options.
Mike
------------------------------
Exactly. Having gone from designing in 6 um NMOS
to 90 nm CMOS over the first quarter century of my
adult life I have very little tolerance for tech prophets
claiming the "end is near" for mainstream semi tech-
nology. I have heard it a hundred times before starting
around 1.5 um.
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