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kpf

06/06/04 2:00 PM

#37278 RE: alan81 #37276

alan

The problem Spansion has is they have some older factories that it appears they have no plan, or method, to upgrade to more modern facilities. They will run them until they die at the older generations. They will be a fairly big drag on margins until they finally shut them down. The last time AMD shut down a factory they took good sized hit to earnings.

In fact, it appears that upgrading JV1 or JV2 just would not make sense, so I dont expect such plans. Anyway, I would assume as well JV1 will reach EOL next year or so. However, charges for Fab-closures are mainly related to severance payments for employees. Looking at the facilities in Aizu-Wakamatsu there is an obvious plan/method to avoid this; i.e by gradually moving employees from JV1 to JV3's expanding capacities, which is just next door. JV2s life is extended by means of mirrorbit.

Essence: No big charges looming, let alone drag on margins.

K.



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sgolds

06/06/04 2:06 PM

#37279 RE: alan81 #37276

alan81 -

Is the rapid ramp occuring? Or is it predicted to occur. It appears the Q2 number is up slightly, but the real jump does not happen until Q4.

The ramp is occurring. Note that this foil was shown in the last week so Q2 numbers are in the bag. It shows Q3 significantly higher (about 50% higher) than Q2, and then a doubling from Q3 to Q4. You know what the lead times are like for flash designs, the OEM commitments for Q3 and Q4 came many months ago (although they are booked when shipped).

In terms of supporting older products on older technologies, the high volume products will be cost reduced onto the newer technologies. The problem Spansion has is they have some older factories that it appears they have no plan, or method, to upgrade to more modern facilities.

Fab 30. Not announced, but no reason to expect anything different from when Fab 25 transitioned from CPUs to flash. Once Fab 36 is up and running with 300mm/65nm CPUs then expect such an announcement (2006 with conversion in 2007). Just history repeating itself.

The other thing that is interesting to note (since you posted the foils) is that the difference in cost between 110nm floating gate and 110nm mirrorbit is not really the 2X that they have been talking about in the past. I was expecting this to happen, but am surprised AMD is displaying it so prominently.

I think this is a misunderstanding. Density doubles but that does not mean cost is cut in half. Now, it is accurate to say that cost is cut because density per cell is doubled. Some may try to turn double density into half cost, but that does not make it so.