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chipguy

11/27/07 3:15 PM

#53463 RE: kpf #53462

Also, AMD could only exploit many of the benefits of SoI a node after they initially used this technology.

Looks to me like AMD's choice of SOI has left them SOL.
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Saturn V

11/27/07 3:26 PM

#53465 RE: kpf #53462

Karl,
As usual you are living in a make believe world, and resorting to wishful thinking.
I will grant you the possibility that maybe most of the problems AMD has faced at 65nm are 300mm wafer issues, and less 65nm lithography issues.

However without HiK, you cannot shrink the 65nm transistors any further,without a dramatic increase in power. So most likely AMD will stick to 65nm transistors, and shrink the other features only. So there will not be any performance gain, and the chip size will not scale as normal shrinks do.All the SOI gains have been accomplished at earlier nodes, so it is unlikely that AMD can pull anything new out of SOI hat.

So AMD can expect some cost advantages on the Barcelona and Phenom, but will be stuck at roughly the same clock speeds.So AMD will be able to better compete at the low end of the performance range, and hope to survive as a bargain basement supplier.
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alan81

11/27/07 5:32 PM

#53474 RE: kpf #53462

I thought AMD had a 90nm process on 300mm wafers...
Was that just PR hot air?
Their move from 90 to 65 was particularly hard for the transition to a completely new 300mm toolset
Granted, the move to 300mm is certainly a fair amount of work... but then so will be the transition to immersion litho.
--Alan